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- [198017]: Merge r197687 - [JSC] Improve how DFG zero Floating Point registers ...
- ... org/show_bug.cgi?id=155096 Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-03-07 Reviewed by Geoffrey Garen. DFG had a weird way of zeroing a FPR: -zero a GP. -move that to a FP. Filip added moveZeroToDouble() for B3. This patch uses that in the lower tiers. * assembler/Macro ...
- By Mar 11, 2016 6:37:34 AM —
- [197994]: [JSC] Add register reuse for ArithAdd of an Int32 and constant in DFG ...
- ... org/show_bug.cgi?id=155164 Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-03-10 Reviewed by Geoffrey Garen. Every "inc" in loop was looking like this: move rX, rY inc rY jo 0x230f4a200580 This patch add register Reuse to that case to remove the extra "move". * dfg/DFGOSR ...
- By Mar 10, 2016 10:04:49 PM —
- [197895]: [JSC] Fix the ARM64 MacroAssembler after r197816 ...
- ... org/show_bug.cgi?id=155268 Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-03-09 Reviewed by Mark Lam. The patch tries to generate instructions that do not exist, causing quite fun stuff at runtime. * assembler/MacroAssemblerARM64.h: (JSC::MacroAssemblerARM64::load8): (JSC::MacroAssem ...
- By Mar 9, 2016 3:57:30 PM —
- [197851]: Merge r197652 - [JSC] Improve codegen of Compare and Test ...
- ... org/show_bug.cgi?id=155055 Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-03-06 Reviewed by Filip Pizlo. Source/JavaScriptCore: This patch introduces a few improvements on how we lower Compare and Test with immediates: -Add certain Immediate forms of ARM64. -Use CBZ/CBNZ when ...
- By Mar 9, 2016 2:28:11 AM —
- [197763]: Merge r197546 - [JSC] Add support for MADD, MSUB and MNEG to Air ...
- ... org/show_bug.cgi?id=154997 Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-03-03 Reviewed by Filip Pizlo. ARM64 can do an Add/Sub in the Multiply units. LLVM was doing so but we lost that when switching to B3. This patch adds those instructions in Air. There are more ALUs than multip ...
- By Mar 8, 2016 6:50:15 AM —
- [197757]: Merge r197491 - [JSC] JSCell_freeListNext and JSCell_structureID are ...
- ... org/show_bug.cgi?id=154947 Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-03-02 Reviewed by Filip Pizlo. This bug was discovered while testing https://bugs.webkit.org/show_bug.cgi?id=154894. The problem was that JSCell_freeListNext and JSCell_structureID were considered as disjoint. ...
- By Mar 8, 2016 5:23:49 AM —
- [197756]: Merge r197490 - [JSC] Improve Select of Doubles based on Double ...
- ... org/show_bug.cgi?id=154572 Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-03-02 Reviewed by Filip Pizlo. Octane has a bunch of Select on Double based on comparing Doubles. A few nodes generate that: ValueRep, Min, Max, etc. On ARM64, we can improve our code a lot. ARM can do a select ...
- By Mar 8, 2016 4:57:22 AM —
- [197745]: Merge r197446 - [JSC] Use a Move without REX byte when possible ...
- ... org/show_bug.cgi?id=154801 Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-03-02 Reviewed by Alex Christensen. Filip wrote an optimization in the register allocator to use 32bit "Move" when we don't care about the top bytes. When I moved the commutative ops to the fake 3 operands inst ...
- By Mar 8, 2016 1:31:03 AM —
- [197725]: [JSC] Small clean up of how we use SSA's valuesAtHead ...
- ... org/show_bug.cgi?id=155152 Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-03-07 Reviewed by Filip Pizlo. liveAtHead and valuesAtHead contain the same nodes, we do not need the extra look up. This also opens the way to use the same kind of liveness analysis as Air (where live values a ...
- By Mar 7, 2016 9:56:53 PM —
- [197687]: [JSC] Improve how DFG zero Floating Point registers ...
- ... org/show_bug.cgi?id=155096 Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-03-07 Reviewed by Geoffrey Garen. DFG had a weird way of zeroing a FPR: -zero a GP. -move that to a FP. Filip added moveZeroToDouble() for B3. This patch uses that in the lower tiers. * assembler/Macro ...
- By Mar 7, 2016 10:25:55 AM —
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