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- [194315]: [JSC] FTLB3Output generates some invalid ZExt32 ...
- ... org/show_bug.cgi?id=151905 Patch by Benjamin Poulain <bpoulain@apple.com> on 2015-12-19 Reviewed by Filip Pizlo. FTLLowerDFGToLLVM calls zeroExt() to int32 in some cases. We were generating ZExt32 with Int32 as return type :( * ftl/FTLB3Output.h: (JSC::FTL::Output::zeroExt):
- By Dec 19, 2015 11:01:50 AM —
- [194314]: [JSC] Add EqualOrUnordered to B3 ...
- ... org/show_bug.cgi?id=152425 Patch by Benjamin Poulain <bpoulain@apple.com> on 2015-12-19 Reviewed by Mark Lam. Add EqualOrUnordered to B3 and use it to implements FTL::Output's NotEqualAndOrdered. * b3/B3ConstDoubleValue.cpp: (JSC::B3::ConstDoubleValue::equalOrUnordered): * b3/B3ConstDoubleVa ...
- By Dec 19, 2015 8:52:11 AM —
- [194312]: [JSC] B3: Add indexed addressing when lowering BitwiseCast ...
- ... org/show_bug.cgi?id=152432 Patch by Benjamin Poulain <bpoulain@apple.com> on 2015-12-19 Reviewed by Geoffrey Garen. The MacroAssembler supports it, we should use it. * b3/air/AirOpcode.opcodes: * b3/testb3.cpp: (JSC::B3::testBitwiseCastOnDoubleInMemoryIndexed): (JSC::B3::testBitwiseCastOnInt ...
- By Dec 19, 2015 1:01:00 AM —
- [194071]: Fix bad copy-paste in r194062 Patch by Benjamin Poulain ...
- Fix bad copy-paste in r194062 Patch by Benjamin Poulain <bpoulain@apple.com> on 2015-12-14 * ftl/FTLB3Output.h: (JSC::FTL::Output::ceil64):
- By Dec 14, 2015 4:11:45 PM —
- [194062]: [JSC] Add ceil() support for x86 and expose it to B3 ...
- ... org/show_bug.cgi?id=152231 Patch by Benjamin Poulain <bpoulain@apple.com> on 2015-12-14 Reviewed by Geoffrey Garen. Most x86 CPUs we care about support ceil() natively with the round instruction. This patch expose that behind a runtime flag, use it in the Math.ceil() thunk and expose it to B ...
- By Dec 14, 2015 2:44:22 PM —
- [194024]: [JSC] Remove FTL::Output's doubleEqualOrUnordered() ...
- ... org/show_bug.cgi?id=152234 Patch by Benjamin Poulain <bpoulain@apple.com> on 2015-12-13 Reviewed by Sam Weinig. It is unused, one less thing to worry about. * ftl/FTLB3Output.h: (JSC::FTL::Output::doubleEqualOrUnordered): Deleted. * ftl/FTLOutput.h: (JSC::FTL::Output::doubleEqualOrUnordered) ...
- By Dec 13, 2015 8:30:37 PM —
- [194003]: [JSC] Add Floating Point Abs() to B3 ...
- ... org/show_bug.cgi?id=152176 Patch by Benjamin Poulain <bpoulain@apple.com> on 2015-12-11 Reviewed by Geoffrey Garen. This patch adds an Abs() operation for floating point. On x86, Abs() is implemented by masking the top bit of the floating point value. On ARM64, there is a builtin abs opcode. ...
- By Dec 11, 2015 10:10:07 PM —
- [193933]: [JSC] Add a Modulo operator to B3, and a chill variant ...
- ... org/show_bug.cgi?id=152110 Patch by Benjamin Poulain <bpoulain@apple.com> on 2015-12-10 Reviewed by Geoffrey Garen. It is basically refactoring the Div and ChillDiv code to be used by both opcodes. * b3/B3Common.h: (JSC::B3::chillDiv): (JSC::B3::chillMod): * b3/B3Const32Value.cpp: (JSC::B3:: ...
- By Dec 10, 2015 4:31:51 PM —
- [193804]: [JSC] Improve how B3 lowers Add() and Sub() on x86 ...
- ... org/show_bug.cgi?id=152026 Patch by Benjamin Poulain <bpoulain@apple.com> on 2015-12-08 Reviewed by Geoffrey Garen. The assembler was missing some important x86 forms of ADD and SUB that were making our lowering unfriendly with register allocation. First, we were missing a 3 operand version ...
- By Dec 8, 2015 6:30:39 PM —
- [193686]: [JSC] On x86, we should XOR registers instead of moving a zero ...
- ... org/show_bug.cgi?id=151977 Patch by Benjamin Poulain <bpoulain@apple.com> on 2015-12-07 Reviewed by Filip Pizlo. It is smaller and the frontend has special support for xor. * assembler/MacroAssemblerX86Common.h: (JSC::MacroAssemblerX86Common::move): (JSC::MacroAssemblerX86Common::signExtend3 ...
- By Dec 7, 2015 7:35:24 PM —
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