Changeset 158883 in webkit


Ignore:
Timestamp:
Nov 7, 2013 3:45:56 PM (10 years ago)
Author:
msaboff@apple.com
Message:

Change CallFrameRegister to architected frame pointer register
​https://bugs.webkit.org/show_bug.cgi?id=123956

Reviewed by Geoffrey Garen.

Changed X86 and ARM variants as well as MIPS to use their respective architected
frame pointer registers. The freed up callFrameRegisteris are made available to
the DFG register allocator. Modified the FTL OSR exit compiler to use a temporary
register as a stand in for the destination callFrameRegister since the FTL frame
pointer register is needed to extract values from the FTL stack.

Reviewed by Geoffrey Garen.

  • assembler/ARMAssembler.h:
  • assembler/ARMv7Assembler.h:
  • assembler/MacroAssemblerMIPS.h:
  • ftl/FTLOSRExitCompiler.cpp:

(JSC::FTL::compileStub):

  • jit/AssemblyHelpers.h:

(JSC::AssemblyHelpers::addressFor):

  • jit/GPRInfo.h:

(JSC::GPRInfo::toRegister):
(JSC::GPRInfo::toIndex):

  • jit/JITOperations.cpp:
  • jit/JSInterfaceJIT.h:
  • jit/ThunkGenerators.cpp:

(JSC::callToJavaScript):

  • offlineasm/arm.rb:
  • offlineasm/arm64.rb:
  • offlineasm/mips.rb:
  • offlineasm/x86.rb:
Location:
trunk/Source/JavaScriptCore
Files:
14 edited

Legend:

Unmodified
Added
Removed

  • trunk/Source/JavaScriptCore/ChangeLog

    r158875 r158883  
     12013-11-07  Michael Saboff  <msaboff@apple.com>
     2
     3        Change CallFrameRegister to architected frame pointer register
     4        https://bugs.webkit.org/show_bug.cgi?id=123956
     5
     6        Reviewed by Geoffrey Garen.
     7
     8        Changed X86 and ARM variants as well as MIPS to use their respective architected
     9        frame pointer registers.  The freed up callFrameRegisteris are made available to
     10        the DFG register allocator.  Modified the FTL OSR exit compiler to use a temporary
     11        register as a stand in for the destination callFrameRegister since the FTL frame
     12        pointer register is needed to extract values from the FTL stack.
     13
     14        Reviewed by Geoffrey Garen.
     15
     16        * assembler/ARMAssembler.h:
     17        * assembler/ARMv7Assembler.h:
     18        * assembler/MacroAssemblerMIPS.h:
     19        * ftl/FTLOSRExitCompiler.cpp:
     20        (JSC::FTL::compileStub):
     21        * jit/AssemblyHelpers.h:
     22        (JSC::AssemblyHelpers::addressFor):
     23        * jit/GPRInfo.h:
     24        (JSC::GPRInfo::toRegister):
     25        (JSC::GPRInfo::toIndex):
     26        * jit/JITOperations.cpp:
     27        * jit/JSInterfaceJIT.h:
     28        * jit/ThunkGenerators.cpp:
     29        (JSC::callToJavaScript):
     30        * offlineasm/arm.rb:
     31        * offlineasm/arm64.rb:
     32        * offlineasm/mips.rb:
     33        * offlineasm/x86.rb:
     34
    1352013-11-07  Oliver Hunt  <oliver@apple.com>
    236

  • trunk/Source/JavaScriptCore/assembler/ARMAssembler.h

    r158208 r158883  
    4444            r3,
    4545            r4,
    46             r5, fp = r5, // frame pointer
     46            r5,
    4747            r6, S0 = r6,
    4848            r7,
    … …  
    5050            r9,
    5151            r10,
    52             r11,
     52            r11, fp = r11, // frame pointer
    5353            r12, ip = r12, S1 = r12,
    5454            r13, sp = r13,

  • trunk/Source/JavaScriptCore/assembler/ARMv7Assembler.h

    r157264 r158883  
    4646        r5,
    4747        r6,
    48         r7, wr = r7,   // thumb work register
     48        r7, fp = r7,   // frame pointer
    4949        r8,
    5050        r9, sb = r9,   // static base
    5151        r10, sl = r10, // stack limit
    52         r11, fp = r11, // frame pointer
     52        r11,
    5353        r12, ip = r12,
    5454        r13, sp = r13,

  • trunk/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h

    r158670 r158883  
    102102
    103103    static const RegisterID stackPointerRegister = MIPSRegisters::sp;
    104     static const RegisterID framePointerRegister = MIPSRegisters::s0;
     104    static const RegisterID framePointerRegister = MIPSRegisters::fp;
    105105    static const RegisterID returnAddressRegister = MIPSRegisters::ra;
    106106

  • trunk/Source/JavaScriptCore/ftl/FTLOSRExitCompiler.cpp

    r158535 r158883  
    5656    RELEASE_ASSERT(record->patchpointID == exit.m_stackmapID);
    5757   
     58    // This code requires framePointerRegister is the same as callFrameRegister
     59    static_assert(MacroAssembler::framePointerRegister == GPRInfo::callFrameRegister, "MacroAssembler::framePointerRegister and GPRInfo::callFrameRegister must be the same");
     60
    5861    CCallHelpers jit(vm, codeBlock);
    5962   
    … …  
    7780   
    7881    // Get the call frame and tag thingies.
    79     record->locations[0].restoreInto(jit, jitCode->stackmaps, registerScratch, GPRInfo::callFrameRegister);
     82    // Restore the exiting function's callFrame value into a regT4
     83    record->locations[0].restoreInto(jit, jitCode->stackmaps, registerScratch, GPRInfo::regT4);
    8084    jit.move(MacroAssembler::TrustedImm64(TagTypeNumber), GPRInfo::tagTypeNumberRegister);
    8185    jit.move(MacroAssembler::TrustedImm64(TagMask), GPRInfo::tagMaskRegister);
    … …  
    127131        case ExitValueInJSStackAsInt52:
    128132        case ExitValueInJSStackAsDouble:
    129             jit.load64(AssemblyHelpers::addressFor(value.virtualRegister()), GPRInfo::regT0);
     133            jit.load64(AssemblyHelpers::addressFor(value.virtualRegister(), GPRInfo::regT4), GPRInfo::regT0);
    130134            break;
    131135           
    … …  
    147151        reboxAccordingToFormat(
    148152            value.valueFormat(), jit, GPRInfo::regT0, GPRInfo::regT1, GPRInfo::regT2);
    149         jit.store64(GPRInfo::regT0, AssemblyHelpers::addressFor(operand));
    150     }
     153        jit.store64(GPRInfo::regT0, AssemblyHelpers::addressFor(static_cast<VirtualRegister>(operand), GPRInfo::regT4));
     154    }
     155   
     156    // Save the current framePointer into regT3 for the epilogue.
     157    // Put regT4 into callFrameRegister
     158    jit.move(MacroAssembler::framePointerRegister, GPRInfo::regT3);
     159    jit.move(GPRInfo::regT4, GPRInfo::callFrameRegister);
    151160   
    152161    handleExitCounts(jit, exit);
    153162    reifyInlinedCallFrames(jit, exit);
    154163   
    155     jit.move(MacroAssembler::framePointerRegister, MacroAssembler::stackPointerRegister);
    156     jit.pop(MacroAssembler::framePointerRegister);
     164    jit.move(GPRInfo::regT3, MacroAssembler::stackPointerRegister);
     165    jit.pop(GPRInfo::regT3); // ignore prior framePointer
    157166    jit.pop(GPRInfo::nonArgGPR0); // ignore the result.
    158167   

  • trunk/Source/JavaScriptCore/jit/AssemblyHelpers.h

    r158459 r158883  
    177177        return Address(GPRInfo::callFrameRegister, byteOffset);
    178178    }
     179    static Address addressFor(VirtualRegister virtualRegister, GPRReg baseReg)
     180    {
     181        ASSERT(virtualRegister.isValid());
     182        return Address(baseReg, virtualRegister.offset() * sizeof(Register));
     183    }
    179184    static Address addressFor(VirtualRegister virtualRegister)
    180185    {

  • trunk/Source/JavaScriptCore/jit/GPRInfo.h

    r158677 r158883  
    285285public:
    286286    typedef GPRReg RegisterType;
    287     static const unsigned numberOfRegisters = 5;
     287    static const unsigned numberOfRegisters = 6;
    288288    static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
    289289
    … …  
    293293    static const GPRReg regT2 = X86Registers::ecx;
    294294    static const GPRReg regT3 = X86Registers::ebx;
    295     static const GPRReg regT4 = X86Registers::esi;
     295    static const GPRReg regT4 = X86Registers::edi;
     296    static const GPRReg regT5 = X86Registers::esi;
    296297    // These registers match the baseline JIT.
    297298    static const GPRReg cachedResultRegister = regT0;
    298299    static const GPRReg cachedResultRegister2 = regT1;
    299     static const GPRReg callFrameRegister = X86Registers::edi;
     300    static const GPRReg callFrameRegister = X86Registers::ebp;
    300301    // These constants provide the names for the general purpose argument & return value registers.
    301302    static const GPRReg argumentGPR0 = X86Registers::ecx; // regT2
    … …  
    311312    {
    312313        ASSERT(index < numberOfRegisters);
    313         static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4 };
     314        static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5 };
    314315        return registerForIndex[index];
    315316    }
    … …  
    319320        ASSERT(reg != InvalidGPRReg);
    320321        ASSERT(static_cast<int>(reg) < 8);
    321         static const unsigned indexForRegister[8] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 4, InvalidIndex };
     322        static const unsigned indexForRegister[8] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 5, 4 };
    322323        unsigned result = indexForRegister[reg];
    323324        ASSERT(result != InvalidIndex);
    … …  
    348349public:
    349350    typedef GPRReg RegisterType;
    350     static const unsigned numberOfRegisters = 9;
     351    static const unsigned numberOfRegisters = 10;
    351352    static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
    352353
    353354    // These registers match the baseline JIT.
    354355    static const GPRReg cachedResultRegister = X86Registers::eax;
    355     static const GPRReg callFrameRegister = X86Registers::r13;
     356    static const GPRReg callFrameRegister = X86Registers::ebp;
    356357    static const GPRReg tagTypeNumberRegister = X86Registers::r14;
    357358    static const GPRReg tagMaskRegister = X86Registers::r15;
    … …  
    366367    static const GPRReg regT7 = X86Registers::r9;
    367368    static const GPRReg regT8 = X86Registers::r10;
     369    static const GPRReg regT9 = X86Registers::r13;
    368370    // These constants provide the names for the general purpose argument & return value registers.
    369371    static const GPRReg argumentGPR0 = X86Registers::edi; // regT4
    … …  
    383385    {
    384386        ASSERT(index < numberOfRegisters);
    385         static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7, regT8 };
     387        static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7, regT8, regT9 };
    386388        return registerForIndex[index];
    387389    }
    … …  
    398400        ASSERT(reg != InvalidGPRReg);
    399401        ASSERT(static_cast<int>(reg) < 16);
    400         static const unsigned indexForRegister[16] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 5, 4, 6, 7, 8, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
     402        static const unsigned indexForRegister[16] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 5, 4, 6, 7, 8, InvalidIndex, InvalidIndex, 9, InvalidIndex, InvalidIndex };
    401403        unsigned result = indexForRegister[reg];
    402404        ASSERT(result != InvalidIndex);
    … …  
    429431public:
    430432    typedef GPRReg RegisterType;
    431     static const unsigned numberOfRegisters = 9;
     433    static const unsigned numberOfRegisters = 10;
    432434    static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
    433435
    … …  
    442444    static const GPRReg regT7 = ARMRegisters::r11;
    443445    static const GPRReg regT8 = ARMRegisters::r3;
     446    static const GPRReg regT9 = ARMRegisters::r5;
    444447    // These registers match the baseline JIT.
    445448    static const GPRReg cachedResultRegister = regT0;
    446449    static const GPRReg cachedResultRegister2 = regT1;
    447     static const GPRReg callFrameRegister = ARMRegisters::r5;
     450    static const GPRReg callFrameRegister = ARMRegisters::fp;
    448451    // These constants provide the names for the general purpose argument & return value registers.
    449452    static const GPRReg argumentGPR0 = ARMRegisters::r0; // regT0
    … …  
    461464    {
    462465        ASSERT(index < numberOfRegisters);
    463         static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7, regT8 };
     466        static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7, regT8, regT9 };
    464467        return registerForIndex[index];
    465468    }
    … …  
    469472        ASSERT(static_cast<unsigned>(reg) != InvalidGPRReg);
    470473        ASSERT(static_cast<unsigned>(reg) < 16);
    471         static const unsigned indexForRegister[16] = { 0, 1, 2, 8, 3, InvalidIndex, InvalidIndex, InvalidIndex, 4, 5, 6, 7, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
     474        static const unsigned indexForRegister[16] = { 0, 1, 2, 8, 3, 9, InvalidIndex, InvalidIndex, 4, 5, 6, 7, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
    472475        unsigned result = indexForRegister[reg];
    473476        ASSERT(result != InvalidIndex);
    … …  
    505508    static const GPRReg cachedResultRegister = ARM64Registers::x0;
    506509    static const GPRReg timeoutCheckRegister = ARM64Registers::x26;
    507     static const GPRReg callFrameRegister = ARM64Registers::x25;
     510    static const GPRReg callFrameRegister = ARM64Registers::fp;
    508511    static const GPRReg tagTypeNumberRegister = ARM64Registers::x27;
    509512    static const GPRReg tagMaskRegister = ARM64Registers::x28;
    … …  
    593596public:
    594597    typedef GPRReg RegisterType;
    595     static const unsigned numberOfRegisters = 6;
     598    static const unsigned numberOfRegisters = 7;
    596599    static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
    597600
    … …  
    603606    static const GPRReg regT4 = MIPSRegisters::t5;
    604607    static const GPRReg regT5 = MIPSRegisters::t6;
     608    static const GPRReg regT6 = MIPSRegisters::s0;
    605609    // These registers match the baseline JIT.
    606610    static const GPRReg cachedResultRegister = regT0;
    607611    static const GPRReg cachedResultRegister2 = regT1;
    608     static const GPRReg callFrameRegister = MIPSRegisters::s0;
     612    static const GPRReg callFrameRegister = MIPSRegisters::fp;
    609613    // These constants provide the names for the general purpose argument & return value registers.
    610614    static const GPRReg argumentGPR0 = MIPSRegisters::a0;
    … …  
    622626    {
    623627        ASSERT(index < numberOfRegisters);
    624         static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5 };
     628        static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6 };
    625629        return registerForIndex[index];
    626630    }
    … …  
    633637            InvalidIndex, InvalidIndex, 0, 1, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex,
    634638            InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, 2, 4, 5, InvalidIndex,
    635             InvalidIndex, InvalidIndex, 3, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex
     639            6, InvalidIndex, 3, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex
    636640        };
    637641        unsigned result = indexForRegister[reg];

  • trunk/Source/JavaScriptCore/jit/JITOperations.cpp

    r158586 r158883  
    17181718HIDE_SYMBOL(getHostCallReturnValue) "\n"
    17191719SYMBOL_STRING(getHostCallReturnValue) ":" "\n"
    1720     "mov 0(%r13), %r13\n" // CallerFrameAndPC::callerFrame
    1721     "mov %r13, %rdi\n"
     1720    "mov 0(%rbp), %rbp\n" // CallerFrameAndPC::callerFrame
     1721    "mov %rbp, %rdi\n"
    17221722    "jmp " LOCAL_REFERENCE(getHostCallReturnValueWithExecState) "\n"
    17231723);
    … …  
    17291729HIDE_SYMBOL(getHostCallReturnValue) "\n"
    17301730SYMBOL_STRING(getHostCallReturnValue) ":" "\n"
    1731     "mov 0(%edi), %edi\n" // CallerFrameAndPC::callerFrame
    1732     "mov %edi, 4(%esp)\n"
     1731    "mov 0(%ebp), %ebp\n" // CallerFrameAndPC::callerFrame
     1732    "mov %ebp, 4(%esp)\n"
    17331733    "jmp " LOCAL_REFERENCE(getHostCallReturnValueWithExecState) "\n"
    17341734);

  • trunk/Source/JavaScriptCore/jit/JSInterfaceJIT.h

    r158751 r158883  
    7474#endif
    7575
    76         static const RegisterID callFrameRegister = X86Registers::r13;
     76        static const RegisterID callFrameRegister = X86Registers::ebp;
    7777        static const RegisterID tagTypeNumberRegister = X86Registers::r14;
    7878        static const RegisterID tagMaskRegister = X86Registers::r15;
    … …  
    9999        static const RegisterID secondArgumentRegister = X86Registers::edx;
    100100       
    101         static const RegisterID callFrameRegister = X86Registers::edi;
     101        static const RegisterID callFrameRegister = X86Registers::ebp;
    102102       
    103103        static const RegisterID regT0 = X86Registers::eax;
    … …  
    125125        static const RegisterID regT5 = ARMRegisters::r8;
    126126
    127         static const RegisterID callFrameRegister = ARMRegisters::r5;
     127        static const RegisterID callFrameRegister = ARMRegisters::fp;
    128128
    129129        static const FPRegisterID fpRegT0 = ARMRegisters::d0;
    … …  
    147147        static const RegisterID regT4 = ARM64Registers::x24;
    148148       
    149         static const RegisterID callFrameRegister = ARM64Registers::x25;
     149        static const RegisterID callFrameRegister = ARM64Registers::fp;
    150150        static const RegisterID timeoutCheckRegister = ARM64Registers::x26;
    151151        static const RegisterID tagTypeNumberRegister = ARM64Registers::x27;
    … …  
    179179        static const RegisterID regT5 = MIPSRegisters::t6;
    180180
    181         static const RegisterID callFrameRegister = MIPSRegisters::s0;
     181        static const RegisterID callFrameRegister = MIPSRegisters::fp;
    182182       
    183183        static const FPRegisterID fpRegT0 = MIPSRegisters::f4;

  • trunk/Source/JavaScriptCore/jit/ThunkGenerators.cpp

    r158858 r158883  
    222222    jit.push(ARMRegisters::r11);
    223223    jit.push(ARMRegisters::lr);
    224 
     224    jit.move(ARMRegisters::r11, GPRInfo::nonArgGPR0);
    225225    jit.subPtr(CCallHelpers::TrustedImm32(EXTRA_STACK_SIZE), ARMRegisters::sp);
    226226
    227227#   define CALLFRAME_SRC_REG GPRInfo::argumentGPR1
    228 #   define PREVIOUS_CALLFRAME_REG ARMRegisters::r11
     228#   define PREVIOUS_CALLFRAME_REG GPRInfo::nonArgGPR0
    229229#elif CPU(ARM_THUMB2)
    230230    jit.push(ARMRegisters::lr);
    … …  
    237237    jit.push(ARMRegisters::r10);
    238238    jit.push(ARMRegisters::r11);
     239    jit.move(ARMRegisters::r7, GPRInfo::nonArgGPR0);
    239240    jit.subPtr(CCallHelpers::TrustedImm32(EXTRA_STACK_SIZE), ARMRegisters::sp);
    240241
    241242#   define CALLFRAME_SRC_REG GPRInfo::argumentGPR1
    242 #   define PREVIOUS_CALLFRAME_REG ARMRegisters::r7
     243#   define PREVIOUS_CALLFRAME_REG GPRInfo::nonArgGPR0
    243244#elif CPU(ARM64)
    244245    jit.push(ARM64Registers::lr);
    … …  
    254255    jit.push(ARM64Registers::x28);
    255256    jit.push(ARM64Registers::x29);
     257    jit.move(ARM64Registers::x29, GPRInfo::nonArgGPR0);
    256258
    257259#   define CALLFRAME_SRC_REG GPRInfo::argumentGPR1
    258 #   define PREVIOUS_CALLFRAME_REG ARM64Registers::x29
     260#   define PREVIOUS_CALLFRAME_REG GPRInfo::nonArgGPR0
    259261#elif CPU(MIPS)
    260262    jit.subPtr(CCallHelpers::TrustedImm32(STACK_LENGTH), MIPSRegisters::sp);
    … …  
    268270    jit.storePtr(MIPSRegisters::gp), CCallHelpers::Address(MIPSRegisters::sp, PRESERVED_GP_OFFSET));
    269271#endif
     272    jit.move(MIPSRegisters::fp, GPRInfo::nonArgGPR0);
    270273
    271274#   define CALLFRAME_SRC_REG GPRInfo::argumentGPR1
    272 #   define PREVIOUS_CALLFRAME_REG MIPSRegisters::fp
     275#   define PREVIOUS_CALLFRAME_REG GPRInfo::nonArgGPR0
    273276#elif CPU(SH4)
    274277    jit.push(SH4Registers::fp);

  • trunk/Source/JavaScriptCore/offlineasm/arm.rb

    r157474 r158883  
    100100            "r10"
    101101        when "cfr"
    102             "r5"
     102            isARMv7 ?  "r7" : "r11"
    103103        when "lr"
    104104            "lr"

  • trunk/Source/JavaScriptCore/offlineasm/arm64.rb

    r157474 r158883  
    118118            arm64GPRName('x12', kind)
    119119        when 'cfr'
    120             arm64GPRName('x25', kind)
     120            arm64GPRName('x29', kind)
    121121        when 'csr1'
    122122            arm64GPRName('x27', kind)

  • trunk/Source/JavaScriptCore/offlineasm/mips.rb

    r153375 r158883  
    102102            "$t8"
    103103        when "cfr"
    104             "$s0"
     104            "$fp"
    105105        when "lr"
    106106            "$ra"

  • trunk/Source/JavaScriptCore/offlineasm/x86.rb

    r154095 r158883  
    167167                case kind
    168168                when :half
    169                     "%r13w"
     169                    "%bp"
    170170                when :int
    171                     "%r13d"
     171                    "%ebp"
    172172                when :ptr
    173                     "%r13"
     173                    "%rbp"
    174174                when :quad
    175                     "%r13"
     175                    "%rbp"
    176176                else
    177177                    raise
    … …  
    179179            else
    180180                case kind
    181                 when :byte
    182                     "%dil"
    183181                when :half
    184                     "%di"
     182                    "%bp"
    185183                when :int
    186                     "%edi"
     184                    "%ebp"
    187185                when :ptr
    188                     "%edi"
     186                    "%ebp"
    189187                else
    190188                    raise
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