Changeset 175514 in webkit


Ignore:
Timestamp:
Nov 3, 2014 11:36:15 PM (9 years ago)
Author:
commit-queue@webkit.org
Message:

Workaround for Cortex-A53 erratum 835769
​https://bugs.webkit.org/show_bug.cgi?id=138315

Patch by Akos Kiss <​akiss@inf.u-szeged.hu> on 2014-11-03
Reviewed by Filip Pizlo.

This patch introduces CMake variable and preprocessor macro
WTF_CPU_ARM64_CORTEXA53 with the aim of enabling Cortex-A53-specific
.:

code paths, if set true.

  • Source/cmake/OptionsCommon.cmake:

Add -mfix-cortex-a53-835769 to the compiler flags if compiler supports
it.

  • Source/cmakeconfig.h.cmake:

#cmakedefine01 for WTF_CPU_ARM64_CORTEXA53

Source/JavaScriptCore:

code paths, if set true. The patch also implements one case where such
code paths are needed: the workaround for Cortex-A53 erratum 835769. If
WTF_CPU_ARM64_CORTEXA53 is set then:

  • CMake checks whether the compiler already has support for a workaround and adds -mfix-cortex-a53-835769 to the compiler flags if so,
  • the ARM64 backend of offlineasm inserts a nop between memory and multiply-accumulate instructions, and
  • the ARM64 assembler also inserts a nop between memory and (64-bit) multiply-accumulate instructions.
  • assembler/ARM64Assembler.h:

(JSC::ARM64Assembler::madd):
Call nopCortexA53Fix835769() to insert a nop if CPU(ARM64_CORTEXA53) and
if necessary.
(JSC::ARM64Assembler::msub): Likewise.
(JSC::ARM64Assembler::smaddl): Likewise.
(JSC::ARM64Assembler::smsubl): Likewise.
(JSC::ARM64Assembler::umaddl): Likewise.
(JSC::ARM64Assembler::umsubl): Likewise.
(JSC::ARM64Assembler::nopCortexA53Fix835769):
Added. Insert a nop if the previously emitted instruction was a load, a
store, or a prefetch, and if the current instruction is 64-bit.

  • offlineasm/arm64.rb:

Add the arm64CortexA53Fix835769 phase and call it from
getModifiedListARM64 to insert nopCortexA53Fix835769 between appropriate
macro instructions. Also, lower nopCortexA53Fix835769 to nop if
CPU(ARM64_CORTEXA53), to nothing otherwise.

  • offlineasm/instructions.rb:

Define macro instruction nopFixCortexA53Err835769.

Location:
trunk
Files:
7 edited

Legend:

Unmodified
Added
Removed

  • trunk/ChangeLog

    r175465 r175514  
     12014-11-03  Akos Kiss  <akiss@inf.u-szeged.hu>
     2
     3        Workaround for Cortex-A53 erratum 835769
     4        https://bugs.webkit.org/show_bug.cgi?id=138315
     5
     6        Reviewed by Filip Pizlo.
     7
     8        This patch introduces CMake variable and preprocessor macro
     9        WTF_CPU_ARM64_CORTEXA53 with the aim of enabling Cortex-A53-specific
     10        code paths, if set true.
     11
     12        * Source/cmake/OptionsCommon.cmake:
     13        Add -mfix-cortex-a53-835769 to the compiler flags if compiler supports
     14        it.
     15        * Source/cmakeconfig.h.cmake:
     16        #cmakedefine01 for WTF_CPU_ARM64_CORTEXA53
     17
    1182014-11-02  Akos Kiss  <akiss@inf.u-szeged.hu>
    219

  • trunk/Source/JavaScriptCore/ChangeLog

    r175512 r175514  
     12014-11-03  Akos Kiss  <akiss@inf.u-szeged.hu>
     2
     3        Workaround for Cortex-A53 erratum 835769
     4        https://bugs.webkit.org/show_bug.cgi?id=138315
     5
     6        Reviewed by Filip Pizlo.
     7
     8        This patch introduces CMake variable and preprocessor macro
     9        WTF_CPU_ARM64_CORTEXA53 with the aim of enabling Cortex-A53-specific
     10        code paths, if set true. The patch also implements one case where such
     11        code paths are needed: the workaround for Cortex-A53 erratum 835769. If
     12        WTF_CPU_ARM64_CORTEXA53 is set then:
     13        - CMake checks whether the compiler already has support for a workaround
     14          and adds -mfix-cortex-a53-835769 to the compiler flags if so,
     15        - the ARM64 backend of offlineasm inserts a nop between memory and
     16          multiply-accumulate instructions, and
     17        - the ARM64 assembler also inserts a nop between memory and (64-bit)
     18          multiply-accumulate instructions.
     19
     20        * assembler/ARM64Assembler.h:
     21        (JSC::ARM64Assembler::madd):
     22        Call nopCortexA53Fix835769() to insert a nop if CPU(ARM64_CORTEXA53) and
     23        if necessary.
     24        (JSC::ARM64Assembler::msub): Likewise.
     25        (JSC::ARM64Assembler::smaddl): Likewise.
     26        (JSC::ARM64Assembler::smsubl): Likewise.
     27        (JSC::ARM64Assembler::umaddl): Likewise.
     28        (JSC::ARM64Assembler::umsubl): Likewise.
     29        (JSC::ARM64Assembler::nopCortexA53Fix835769):
     30        Added. Insert a nop if the previously emitted instruction was a load, a
     31        store, or a prefetch, and if the current instruction is 64-bit.
     32        * offlineasm/arm64.rb:
     33        Add the arm64CortexA53Fix835769 phase and call it from
     34        getModifiedListARM64 to insert nopCortexA53Fix835769 between appropriate
     35        macro instructions. Also, lower nopCortexA53Fix835769 to nop if
     36        CPU(ARM64_CORTEXA53), to nothing otherwise.
     37        * offlineasm/instructions.rb:
     38        Define macro instruction nopFixCortexA53Err835769.
     39
    1402014-11-03  Commit Queue  <commit-queue@webkit.org>
    241

  • trunk/Source/JavaScriptCore/assembler/ARM64Assembler.h

    r172578 r175514  
    15691569    {
    15701570        CHECK_DATASIZE();
     1571        nopCortexA53Fix835769<datasize>();
    15711572        insn(dataProcessing3Source(DATASIZE, DataOp_MADD, rm, ra, rn, rd));
    15721573    }
    … …  
    16211622    {
    16221623        CHECK_DATASIZE();
     1624        nopCortexA53Fix835769<datasize>();
    16231625        insn(dataProcessing3Source(DATASIZE, DataOp_MSUB, rm, ra, rn, rd));
    16241626    }
    … …  
    18071809    ALWAYS_INLINE void smaddl(RegisterID rd, RegisterID rn, RegisterID rm, RegisterID ra)
    18081810    {
     1811        nopCortexA53Fix835769<64>();
    18091812        insn(dataProcessing3Source(Datasize_64, DataOp_SMADDL, rm, ra, rn, rd));
    18101813    }
    … …  
    18171820    ALWAYS_INLINE void smsubl(RegisterID rd, RegisterID rn, RegisterID rm, RegisterID ra)
    18181821    {
     1822        nopCortexA53Fix835769<64>();
    18191823        insn(dataProcessing3Source(Datasize_64, DataOp_SMSUBL, rm, ra, rn, rd));
    18201824    }
    … …  
    20602064    ALWAYS_INLINE void umaddl(RegisterID rd, RegisterID rn, RegisterID rm, RegisterID ra)
    20612065    {
     2066        nopCortexA53Fix835769<64>();
    20622067        insn(dataProcessing3Source(Datasize_64, DataOp_UMADDL, rm, ra, rn, rd));
    20632068    }
    … …  
    20702075    ALWAYS_INLINE void umsubl(RegisterID rd, RegisterID rn, RegisterID rm, RegisterID ra)
    20712076    {
     2077        nopCortexA53Fix835769<64>();
    20722078        insn(dataProcessing3Source(Datasize_64, DataOp_UMSUBL, rm, ra, rn, rd));
    20732079    }
    … …  
    36303636    }
    36313637
     3638    // Workaround for Cortex-A53 erratum (835769). Emit an extra nop if the
     3639    // last instruction in the buffer is a load, store or prefetch. Needed
     3640    // before 64-bit multiply-accumulate instructions.
     3641    template<int datasize>
     3642    ALWAYS_INLINE void nopCortexA53Fix835769()
     3643    {
     3644#if CPU(ARM64_CORTEXA53)
     3645        CHECK_DATASIZE();
     3646        if (datasize == 64) {
     3647            if (LIKELY(m_buffer.codeSize() >= sizeof(int32_t))) {
     3648                // From ARMv8 Reference Manual, Section C4.1: the encoding of the
     3649                // instructions in the Loads and stores instruction group is:
     3650                // ---- 1-0- ---- ---- ---- ---- ---- ----
     3651                if (UNLIKELY((*reinterpret_cast_ptr<int32_t*>(reinterpret_cast_ptr<char*>(m_buffer.data()) + m_buffer.codeSize() - sizeof(int32_t)) & 0x0a000000) == 0x08000000))
     3652                    nop();
     3653            }
     3654        }
     3655#endif
     3656    }
     3657
    36323658    AssemblerBuffer m_buffer;
    36333659    Vector<LinkRecord, 0, UnsafeVectorOverflow> m_jumpsToLink;

  • trunk/Source/JavaScriptCore/offlineasm/arm64.rb

    r173497 r175514  
    229229end
    230230
     231# Workaround for Cortex-A53 erratum (835769)
     232def arm64CortexA53Fix835769(list)
     233    newList = []
     234    lastOpcodeUnsafe = false
     235
     236    list.each {
     237        | node |
     238        if node.is_a? Instruction
     239            case node.opcode
     240            when /^store/, /^load/
     241                # List all macro instructions that can be lowered to a load, store or prefetch ARM64 assembly instruction
     242                lastOpcodeUnsafe = true
     243            when  "muli", "mulp", "mulq", "smulli"
     244                # List all macro instructions that can be lowered to a 64-bit multiply-accumulate ARM64 assembly instruction
     245                # (defined as one of MADD, MSUB, SMADDL, SMSUBL, UMADDL or UMSUBL).
     246                if lastOpcodeUnsafe
     247                    newList << Instruction.new(node.codeOrigin, "nopCortexA53Fix835769", [])
     248                end
     249                lastOpcodeUnsafe = false
     250            else
     251                lastOpcodeUnsafe = false
     252            end
     253        end
     254        newList << node
     255    }
     256    newList
     257end
     258
    231259class Sequence
    232260    def getModifiedListARM64
    … …  
    285313        result = assignRegistersToTemporaries(result, :gpr, ARM64_EXTRA_GPRS)
    286314        result = assignRegistersToTemporaries(result, :fpr, ARM64_EXTRA_FPRS)
     315        result = arm64CortexA53Fix835769(result)
    287316        return result
    288317    end
    … …  
    838867            $asm.puts "dmb sy"
    839868        when "pcrtoaddr"
    840           $asm.puts "adr #{operands[1].arm64Operand(:ptr)}, #{operands[0].value}"
     869            $asm.puts "adr #{operands[1].arm64Operand(:ptr)}, #{operands[0].value}"
     870        when "nopCortexA53Fix835769"
     871            $asm.putStr("#if CPU(ARM64_CORTEXA53)")
     872            $asm.puts "nop"
     873            $asm.putStr("#endif")
    841874        else
    842875            lowerDefault

  • trunk/Source/JavaScriptCore/offlineasm/instructions.rb

    r173232 r175514  
    267267ARM64_INSTRUCTIONS =
    268268    [
    269      "pcrtoaddr"    # Address from PC relative offset - adr instruction
     269     "pcrtoaddr",   # Address from PC relative offset - adr instruction
     270     "nopFixCortexA53Err835769" # nop on Cortex-A53 (nothing otherwise)
    270271    ]
    271272

  • trunk/Source/cmake/OptionsCommon.cmake

    r172698 r175514  
    2929    set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -fno-exceptions -fno-strict-aliasing -fno-rtti")
    3030    set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11")
     31endif ()
     32
     33if (WTF_CPU_ARM64_CORTEXA53)
     34    if (NOT WTF_CPU_ARM64)
     35        message(FATAL_ERROR "WTF_CPU_ARM64_CORTEXA53 set without WTF_CPU_ARM64")
     36    endif ()
     37    message("Checking if compiler supports -mfix-cortex-a53-835769")
     38    execute_process(COMMAND ${CMAKE_C_COMPILER} -mfix-cortex-a53-835769 ERROR_VARIABLE COMPILER_OUTPUT)
     39    if ((NOT "${COMPILER_OUTPUT}" MATCHES "unrecognized command line option")
     40        AND (NOT "${COMPILER_OUTPUT}" MATCHES "unknown argument"))
     41        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfix-cortex-a53-835769")
     42        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mfix-cortex-a53-835769")
     43        message("Enabling Cortex-A53 workaround for compiler")
     44    endif ()
    3145endif ()
    3246

  • trunk/Source/cmakeconfig.h.cmake

    r175414 r175514  
    141141#cmakedefine01 HAVE_LLVM
    142142#cmakedefine01 HAVE_GTK_UNIX_PRINTING
     143#cmakedefine01 WTF_CPU_ARM64_CORTEXA53
    143144
    144145#if defined(BUILDING_GTK__) && !defined(GTK_API_VERSION_2)
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