Changeset 192267 in webkit

Timestamp:

Nov 10, 2015 1:52:01 PM (8 years ago)

Author:

msaboff@apple.com

Message:

X86_64 support for compareDouble(DoubleCondition, FPRegisterID left, FPRegisterID right, RegisterID dest)
​https://bugs.webkit.org/show_bug.cgi?id=151009

Reviewed by Filip Pizlo.

Added compareDouble() macro assembler function and the supporting setnp_r() and setp_r() X86 assembler functions.
Hand tested.

• assembler/MacroAssemblerX86_64.h:

(JSC::MacroAssemblerX86_64::compare64):
(JSC::MacroAssemblerX86_64::compareDouble):
(JSC::MacroAssemblerX86_64::branch64):

• assembler/X86Assembler.h:

(JSC::X86Assembler::setnz_r):
(JSC::X86Assembler::setnp_r):
(JSC::X86Assembler::setp_r):
(JSC::X86Assembler::cdq):

Location:

trunk/Source/JavaScriptCore

Files:

• ChangeLog (modified) (1 diff)
• assembler/MacroAssemblerX86_64.h (modified) (1 diff)
• assembler/X86Assembler.h (modified) (1 diff)

trunk/Source/JavaScriptCore/ChangeLog

@@ +1 @@
+2015-11-10  Michael Saboff  <msaboff@apple.com>
+
+        X86_64 support for compareDouble(DoubleCondition, FPRegisterID left, FPRegisterID right, RegisterID dest)
+        https://bugs.webkit.org/show_bug.cgi?id=151009
+
+        Reviewed by Filip Pizlo.
+
+        Added compareDouble() macro assembler function and the supporting setnp_r() and setp_r() X86 assembler functions.
+        Hand tested.
+
+        * assembler/MacroAssemblerX86_64.h:
+        (JSC::MacroAssemblerX86_64::compare64):
+        (JSC::MacroAssemblerX86_64::compareDouble):
+        (JSC::MacroAssemblerX86_64::branch64):
+        * assembler/X86Assembler.h:
+        (JSC::X86Assembler::setnz_r):
+        (JSC::X86Assembler::setnp_r):
+        (JSC::X86Assembler::setp_r):
+        (JSC::X86Assembler::cdq):
+
 2015-11-10  Saam barati  <sbarati@apple.com>
 

trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h

@@ -578 +578 @@
         m_assembler.movzbl_rr(dest, dest);
     }
-    
+
+    void compareDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right, RegisterID dest)
+    {
+        if (cond & DoubleConditionBitInvert)
+            m_assembler.ucomisd_rr(left, right);
+        else
+            m_assembler.ucomisd_rr(right, left);
+
+        if (cond == DoubleEqual) {
+            if (left == right) {
+                m_assembler.setnp_r(dest);
+                return;
+            }
+
+            Jump isUnordered(m_assembler.jp());
+            m_assembler.sete_r(dest);
+            isUnordered.link(this);
+            return;
+        }
+
+        if (cond == DoubleNotEqualOrUnordered) {
+            if (left == right) {
+                m_assembler.setp_r(dest);
+                return;
+            }
+
+            m_assembler.setp_r(dest);
+            m_assembler.setne_r(dest);
+            return;
+        }
+
+        ASSERT(!(cond & DoubleConditionBitSpecial));
+        m_assembler.setCC_r(static_cast<X86Assembler::Condition>(cond & ~DoubleConditionBits), dest);
+    }
+
     Jump branch64(RelationalCondition cond, RegisterID left, RegisterID right)
     {

trunk/Source/JavaScriptCore/assembler/X86Assembler.h

@@ -1278 +1278 @@
     }
 
+    void setnp_r(RegisterID dst)
+    {
+        m_formatter.twoByteOp8(setccOpcode(ConditionNP), (GroupOpcodeID)0, dst);
+    }
+
+    void setp_r(RegisterID dst)
+    {
+        m_formatter.twoByteOp8(setccOpcode(ConditionP), (GroupOpcodeID)0, dst);
+    }
+
     // Various move ops: