Changeset 215731 in webkit

Timestamp:

Apr 25, 2017 7:15:42 AM (7 years ago)

Author:

zandobersek@gmail.com

Message:

[aarch64] moveConditionally32(), moveConditionallyTest32() should move from/to 64-bit registers
​https://bugs.webkit.org/show_bug.cgi?id=170891

Reviewed by Saam Barati.

moveConditionally32() and moveConditionallyTest32() operations in
MacroAssemblerARM64 properly perform comparisons and tests on 32-bit
values, but end up performing the moves from and to 32-bit registers.

Move operations should instead be done on 64-bit registers, just like
on the X86_64 platform. This is achieved by specifying 64 as the data
size for the csel instructions.

• assembler/MacroAssemblerARM64.h:

(JSC::MacroAssemblerARM64::moveConditionally32):
(JSC::MacroAssemblerARM64::moveConditionallyTest32):

Location:

trunk/Source/JavaScriptCore

Files:

• ChangeLog (modified) (1 diff)
• assembler/MacroAssemblerARM64.h (modified) (5 diffs)

trunk/Source/JavaScriptCore/ChangeLog

@@ +1 @@
+2017-04-25  Zan Dobersek  <zdobersek@igalia.com>
+
+        [aarch64] moveConditionally32(), moveConditionallyTest32() should move from/to 64-bit registers
+        https://bugs.webkit.org/show_bug.cgi?id=170891
+
+        Reviewed by Saam Barati.
+
+        moveConditionally32() and moveConditionallyTest32() operations in
+        MacroAssemblerARM64 properly perform comparisons and tests on 32-bit
+        values, but end up performing the moves from and to 32-bit registers.
+
+        Move operations should instead be done on 64-bit registers, just like
+        on the X86_64 platform. This is achieved by specifying 64 as the data
+        size for the csel instructions.
+
+        * assembler/MacroAssemblerARM64.h:
+        (JSC::MacroAssemblerARM64::moveConditionally32):
+        (JSC::MacroAssemblerARM64::moveConditionallyTest32):
+
 2017-04-24  Joseph Pecoraro  <pecoraro@apple.com>
 

trunk/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h

@@ -2234 +2234 @@
     {
         m_assembler.cmp<32>(left, right);
-        m_assembler.csel<32>(dest, src, dest, ARM64Condition(cond));
+        m_assembler.csel<64>(dest, src, dest, ARM64Condition(cond));
     }
 
@@ -2240 +2240 @@
     {
         m_assembler.cmp<32>(left, right);
-        m_assembler.csel<32>(dest, thenCase, elseCase, ARM64Condition(cond));
+        m_assembler.csel<64>(dest, thenCase, elseCase, ARM64Condition(cond));
     }
 
@@ -2298 +2298 @@
     {
         m_assembler.tst<32>(testReg, mask);
-        m_assembler.csel<32>(dest, src, dest, ARM64Condition(cond));
+        m_assembler.csel<64>(dest, src, dest, ARM64Condition(cond));
     }
 
@@ -2304 +2304 @@
     {
         m_assembler.tst<32>(left, right);
-        m_assembler.csel<32>(dest, thenCase, elseCase, ARM64Condition(cond));
+        m_assembler.csel<64>(dest, thenCase, elseCase, ARM64Condition(cond));
     }
 
@@ -2310 +2310 @@
     {
         test32(left, right);
-        m_assembler.csel<32>(dest, thenCase, elseCase, ARM64Condition(cond));
+        m_assembler.csel<64>(dest, thenCase, elseCase, ARM64Condition(cond));
     }