Changeset 225293 in webkit

Timestamp:

Nov 29, 2017 1:42:00 PM (6 years ago)

Author:

Matt Lewis

Message:

Unreviewed, rolling out r225286.

The source files within this patch have been marked as
executable.

Reverted changeset:

"[MIPS][JSC] Implement MacroAssembler::probe support on MIPS"
​https://bugs.webkit.org/show_bug.cgi?id=175447
​https://trac.webkit.org/changeset/225286

Location:

trunk/Source

Files:

• JavaScriptCore/ChangeLog (modified) (1 diff)
• JavaScriptCore/Sources.txt (modified) (1 diff, 1 prop)
• JavaScriptCore/assembler/MIPSAssembler.h (modified) (3 diffs, 1 prop)
• JavaScriptCore/assembler/MacroAssemblerMIPS.cpp (deleted)
• JavaScriptCore/assembler/ProbeContext.cpp (modified) (2 diffs, 1 prop)
• JavaScriptCore/assembler/ProbeContext.h (modified) (1 diff, 1 prop)
• JavaScriptCore/assembler/testmasm.cpp (modified) (11 diffs, 1 prop)
• WTF/ChangeLog (modified) (1 diff)
• WTF/wtf/Platform.h (modified) (2 diffs, 1 prop)

trunk/Source/JavaScriptCore/ChangeLog

@@ +1 @@
+2017-11-29  Matt Lewis  <jlewis3@apple.com>
+
+        Unreviewed, rolling out r225286.
+
+        The source files within this patch have been marked as
+        executable.
+
+        Reverted changeset:
+
+        "[MIPS][JSC] Implement MacroAssembler::probe support on MIPS"
+        https://bugs.webkit.org/show_bug.cgi?id=175447
+        https://trac.webkit.org/changeset/225286
+
 2017-11-29  Alex Christensen  <achristensen@webkit.org>
 

trunk/Source/JavaScriptCore/Sources.txt

@@ -48 +48 @@
 assembler/MacroAssemblerARMv7.cpp
 assembler/MacroAssemblerCodeRef.cpp
-assembler/MacroAssemblerMIPS.cpp
 assembler/MacroAssemblerPrinter.cpp
 assembler/MacroAssemblerX86Common.cpp

trunk/Source/JavaScriptCore/assembler/MIPSAssembler.h

@@ -114 +114 @@
     fexr = 26,
     fenr = 28,
-    fcsr = 31,
-    pc
+    fcsr = 31
 } SPRegisterID;
 
@@ -167 +166 @@
 
     static constexpr SPRegisterID firstSPRegister() { return MIPSRegisters::fir; }
-    static constexpr SPRegisterID lastSPRegister() { return MIPSRegisters::pc; }
-    static constexpr unsigned numberOfSPRegisters() { return lastSPRegister() - firstSPRegister() + 1; }
+    static constexpr SPRegisterID lastSPRegister() { return MIPSRegisters::fcsr; }
+    static constexpr unsigned numberOfSPRegisters() { return 5; }
 
     static constexpr FPRegisterID firstFPRegister() { return MIPSRegisters::f0; }
@@ -199 +198 @@
         case MIPSRegisters::fcsr:
             return "fcsr";
-        case MIPSRegisters::pc:
-            return "pc";
         default:
             RELEASE_ASSERT_NOT_REACHED();

trunk/Source/JavaScriptCore/assembler/ProbeContext.cpp

@@ -41 +41 @@
     void* originalLR = cpu.gpr<void*>(ARM64Registers::lr);
     void* originalPC = cpu.pc();
-#elif CPU(MIPS)
-    auto& cpu = context.cpu;
-    void* originalRA = cpu.gpr<void*>(MIPSRegisters::ra);
-    void* originalPC = cpu.pc();
 #endif
 
@@ -54 +50 @@
     // The ARM64 probe trampoline does not support changing both lr and pc.
     RELEASE_ASSERT(originalPC == cpu.pc() || originalLR == cpu.gpr<void*>(ARM64Registers::lr));
-#elif CPU(MIPS)
-    // The MIPS probe trampoline does not support changing both ra and pc.
-    RELEASE_ASSERT(originalPC == cpu.pc() || originalRA == cpu.gpr<void*>(MIPSRegisters::ra));
 #endif
 

trunk/Source/JavaScriptCore/assembler/ProbeContext.h

@@ -116 +116 @@
     return *reinterpret_cast<void**>(&gpr(ARMRegisters::pc));
 #elif CPU(MIPS)
-    return *reinterpret_cast<void**>(&spr(MIPSRegisters::pc));
+    RELEASE_ASSERT_NOT_REACHED();
 #else
 #error "Unsupported CPU"

trunk/Source/JavaScriptCore/assembler/testmasm.cpp

@@ -136 +136 @@
     if (id == ARM64Registers::x18)
         return true;
-#elif CPU(MIPS)
-    if (id == MIPSRegisters::zero || id == MIPSRegisters::k0 || id == MIPSRegisters::k1)
-        return true;
 #endif
     return false;
@@ -404 +401 @@
             }
             for (auto id = CCallHelpers::firstFPRegister(); id <= CCallHelpers::lastFPRegister(); id = nextID(id))
-#if CPU(MIPS)
-                if (!(id & 1))
-#endif
                 CHECK_EQ(cpu.fpr<uint64_t>(id), testWord64(id));
         });
@@ -433 +427 @@
             }
             for (auto id = CCallHelpers::firstFPRegister(); id <= CCallHelpers::lastFPRegister(); id = nextID(id))
-#if CPU(MIPS)
-                if (!(id & 1))
-#endif
                 CHECK_EQ(cpu.fpr<uint64_t>(id), originalState.fpr<uint64_t>(id));
         });
@@ -451 +442 @@
     void* originalSP { nullptr };
     void* modifiedSP { nullptr };
-#if !(CPU(MIPS))
     uintptr_t modifiedFlags { 0 };
-#endif
     
 #if CPU(X86) || CPU(X86_64)
@@ -485 +474 @@
             }
 
-#if !(CPU(MIPS))
             originalState.spr(flagsSPR) = cpu.spr(flagsSPR);
             modifiedFlags = originalState.spr(flagsSPR) ^ flagsMask;
             cpu.spr(flagsSPR) = modifiedFlags;
-#endif
 
             originalSP = cpu.sp();
@@ -510 +497 @@
             }
             for (auto id = CCallHelpers::firstFPRegister(); id <= CCallHelpers::lastFPRegister(); id = nextID(id))
-#if CPU(MIPS)
-                if (!(id & 1))
-#endif
                 CHECK_EQ(cpu.fpr<uint64_t>(id), testWord64(id));
-#if !(CPU(MIPS))
             CHECK_EQ(cpu.spr(flagsSPR) & flagsMask, modifiedFlags & flagsMask);
-#endif
             CHECK_EQ(cpu.sp(), modifiedSP);
         });
@@ -531 +513 @@
             for (auto id = CCallHelpers::firstFPRegister(); id <= CCallHelpers::lastFPRegister(); id = nextID(id))
                 cpu.fpr(id) = originalState.fpr(id);
-#if !(CPU(MIPS))
             cpu.spr(flagsSPR) = originalState.spr(flagsSPR);
-#endif
             cpu.sp() = originalSP;
         });
@@ -547 +527 @@
             }
             for (auto id = CCallHelpers::firstFPRegister(); id <= CCallHelpers::lastFPRegister(); id = nextID(id))
-#if CPU(MIPS)
-                if (!(id & 1))
-#endif
                 CHECK_EQ(cpu.fpr<uint64_t>(id), originalState.fpr<uint64_t>(id));
-#if !(CPU(MIPS))
             CHECK_EQ(cpu.spr(flagsSPR) & flagsMask, originalState.spr(flagsSPR) & flagsMask);
-#endif
             CHECK_EQ(cpu.sp(), originalSP);
         });
@@ -666 +641 @@
                 cpu.fpr(id) = bitwise_cast<double>(testWord64(id));
             }
-#if !(CPU(MIPS))
             originalState.spr(flagsSPR) = cpu.spr(flagsSPR);
             modifiedFlags = originalState.spr(flagsSPR) ^ flagsMask;
             cpu.spr(flagsSPR) = modifiedFlags;
-#endif
 
             // Ensure that we'll be writing over the regions of the stack where the Probe::State is.
@@ -704 +677 @@
             }
             for (auto id = CCallHelpers::firstFPRegister(); id <= CCallHelpers::lastFPRegister(); id = nextID(id))
-#if CPU(MIPS)
-                if (!(id & 1))
-#endif
                 CHECK_EQ(cpu.fpr<uint64_t>(id), testWord64(id));
-#if !(CPU(MIPS))
             CHECK_EQ(cpu.spr(flagsSPR) & flagsMask, modifiedFlags & flagsMask);
-#endif
             CHECK_EQ(cpu.sp(), newSP);
 
@@ -734 +702 @@
             for (auto id = CCallHelpers::firstFPRegister(); id <= CCallHelpers::lastFPRegister(); id = nextID(id))
                 cpu.fpr(id) = originalState.fpr(id);
-#if !(CPU(MIPS))
             cpu.spr(flagsSPR) = originalState.spr(flagsSPR);
-#endif
             cpu.sp() = originalSP;
         });

trunk/Source/WTF/ChangeLog

@@ +1 @@
+2017-11-29  Matt Lewis  <jlewis3@apple.com>
+
+        Unreviewed, rolling out r225286.
+
+        The source files within this patch have been marked as
+        executable.
+
+        Reverted changeset:
+
+        "[MIPS][JSC] Implement MacroAssembler::probe support on MIPS"
+        https://bugs.webkit.org/show_bug.cgi?id=175447
+        https://trac.webkit.org/changeset/225286
+
 2017-11-29  Stanislav Ocovaj  <stanislav.ocovaj@rt-rk.com>
 

trunk/Source/WTF/wtf/Platform.h

@@ -804 +804 @@
 #define ENABLE_DFG_JIT 1
 #endif
-/* Enable the DFG JIT on MIPS. */
-#if CPU(MIPS)
-#define ENABLE_DFG_JIT 1
-#endif
+/* FIXME: MIPS cannot enable the DFG until it has support for MacroAssembler::probe().
+   https://bugs.webkit.org/show_bug.cgi?id=175447
+*/
 #endif
 
@@ -826 +825 @@
 #endif
 
-#if CPU(X86) || CPU(X86_64) || CPU(ARM_THUMB2) || CPU(ARM64) || CPU(ARM_TRADITIONAL) || CPU(MIPS)
+#if CPU(X86) || CPU(X86_64) || CPU(ARM_THUMB2) || CPU(ARM64) || CPU(ARM_TRADITIONAL)
 #define ENABLE_MASM_PROBE 1
 #else