Changeset 238439 in webkit
- Timestamp:
- Nov 21, 2018 9:47:05 PM (5 years ago)
- Location:
- trunk/Source
- Files:
-
- 4 deleted
- 31 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/Source/JavaScriptCore/CMakeLists.txt
r238192 r238439 241 241 elseif (ARM_THUMB2_DETECTED) 242 242 set(OFFLINE_ASM_BACKEND "ARMv7") 243 elseif (ARM_TRADITIONAL_DETECTED)244 set(OFFLINE_ASM_BACKEND "ARMv7_TRADITIONAL")245 243 elseif (WTF_CPU_MIPS) 246 244 set(OFFLINE_ASM_BACKEND "MIPS") … … 425 423 426 424 assembler/ARM64Assembler.h 427 assembler/ARMAssembler.h428 425 assembler/ARMv7Assembler.h 429 426 assembler/AbortReason.h … … 437 434 assembler/MIPSAssembler.h 438 435 assembler/MacroAssembler.h 439 assembler/MacroAssemblerARM.h440 436 assembler/MacroAssemblerARM64.h 441 437 assembler/MacroAssemblerARMv7.h -
trunk/Source/JavaScriptCore/ChangeLog
r238437 r238439 1 2018-11-21 Yusuke Suzuki <yusukesuzuki@slowstart.org> 2 3 [JSC] Drop ARM_TRADITIONAL support in LLInt, baseline JIT, and DFG 4 https://bugs.webkit.org/show_bug.cgi?id=191675 5 6 Reviewed by Mark Lam. 7 8 We no longer maintain ARM_TRADITIONAL LLInt and JIT in JSC. This architecture will use 9 CLoop instead. This patch removes ARM_TRADITIONAL support in LLInt and JIT. 10 11 Discussed in https://lists.webkit.org/pipermail/webkit-dev/2018-October/030220.html. 12 13 * CMakeLists.txt: 14 * JavaScriptCore.xcodeproj/project.pbxproj: 15 * Sources.txt: 16 * assembler/ARMAssembler.cpp: Removed. 17 * assembler/ARMAssembler.h: Removed. 18 * assembler/LinkBuffer.cpp: 19 (JSC::LinkBuffer::linkCode): 20 (JSC::LinkBuffer::dumpCode): 21 * assembler/MacroAssembler.h: 22 (JSC::MacroAssembler::patchableBranch32): 23 * assembler/MacroAssemblerARM.cpp: Removed. 24 * assembler/MacroAssemblerARM.h: Removed. 25 * assembler/PerfLog.cpp: 26 * assembler/PerfLog.h: 27 * assembler/ProbeContext.h: 28 (JSC::Probe::CPUState::pc): 29 (JSC::Probe::CPUState::fp): 30 (JSC::Probe::CPUState::sp): 31 * assembler/testmasm.cpp: 32 (JSC::isPC): 33 (JSC::testProbeModifiesStackPointer): 34 (JSC::testProbeModifiesStackValues): 35 * bytecode/InlineAccess.h: 36 (JSC::InlineAccess::sizeForPropertyAccess): 37 (JSC::InlineAccess::sizeForPropertyReplace): 38 (JSC::InlineAccess::sizeForLengthAccess): 39 * dfg/DFGSpeculativeJIT.h: 40 * disassembler/CapstoneDisassembler.cpp: 41 (JSC::tryToDisassemble): 42 * jit/AssemblyHelpers.cpp: 43 (JSC::AssemblyHelpers::debugCall): 44 * jit/AssemblyHelpers.h: 45 * jit/CCallHelpers.h: 46 (JSC::CCallHelpers::setupArgumentsImpl): 47 (JSC::CCallHelpers::prepareForTailCallSlow): 48 * jit/CallFrameShuffler.cpp: 49 (JSC::CallFrameShuffler::prepareForTailCall): 50 * jit/HostCallReturnValue.cpp: 51 * jit/JITMathIC.h: 52 (JSC::isProfileEmpty): 53 * jit/RegisterSet.cpp: 54 (JSC::RegisterSet::reservedHardwareRegisters): 55 (JSC::RegisterSet::calleeSaveRegisters): 56 (JSC::RegisterSet::llintBaselineCalleeSaveRegisters): 57 (JSC::RegisterSet::dfgCalleeSaveRegisters): 58 * jit/Repatch.cpp: 59 (JSC::forceICFailure): 60 * jit/ThunkGenerators.cpp: 61 (JSC::nativeForGenerator): 62 * llint/LLIntOfflineAsmConfig.h: 63 * llint/LowLevelInterpreter.asm: 64 * llint/LowLevelInterpreter32_64.asm: 65 * offlineasm/arm.rb: 66 * offlineasm/backends.rb: 67 * yarr/YarrJIT.cpp: 68 (JSC::Yarr::YarrGenerator::generateEnter): 69 (JSC::Yarr::YarrGenerator::generateReturn): 70 1 71 2018-11-21 Saam barati <sbarati@apple.com> 2 72 -
trunk/Source/JavaScriptCore/JavaScriptCore.xcodeproj/project.pbxproj
r238219 r238439 1211 1211 86CCEFDE0F413F8900FD7F9E /* JITCode.h in Headers */ = {isa = PBXBuildFile; fileRef = 86CCEFDD0F413F8900FD7F9E /* JITCode.h */; settings = {ATTRIBUTES = (Private, ); }; }; 1212 1212 86D2221A167EF9440024C804 /* testapi.mm in Sources */ = {isa = PBXBuildFile; fileRef = 86D22219167EF9440024C804 /* testapi.mm */; }; 1213 86D3B2C410156BDE002865E7 /* ARMAssembler.h in Headers */ = {isa = PBXBuildFile; fileRef = 86D3B2C010156BDE002865E7 /* ARMAssembler.h */; settings = {ATTRIBUTES = (Private, ); }; };1214 1213 86D3B2C510156BDE002865E7 /* AssemblerBufferWithConstantPool.h in Headers */ = {isa = PBXBuildFile; fileRef = 86D3B2C110156BDE002865E7 /* AssemblerBufferWithConstantPool.h */; settings = {ATTRIBUTES = (Private, ); }; }; 1215 86D3B2C610156BDE002865E7 /* MacroAssemblerARM.h in Headers */ = {isa = PBXBuildFile; fileRef = 86D3B2C210156BDE002865E7 /* MacroAssemblerARM.h */; settings = {ATTRIBUTES = (Private, ); }; };1216 1214 86D3B3C310159D7F002865E7 /* LinkBuffer.h in Headers */ = {isa = PBXBuildFile; fileRef = 86D3B3C110159D7F002865E7 /* LinkBuffer.h */; settings = {ATTRIBUTES = (Private, ); }; }; 1217 1215 86E116B10FE75AC800B512BC /* CodeLocation.h in Headers */ = {isa = PBXBuildFile; fileRef = 86E116B00FE75AC800B512BC /* CodeLocation.h */; settings = {ATTRIBUTES = (Private, ); }; }; … … 3871 3869 86BF642A148DB2B5004DE36A /* Intrinsic.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = Intrinsic.h; sourceTree = "<group>"; }; 3872 3870 86C36EE90EE1289D00B3DF59 /* MacroAssembler.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MacroAssembler.h; sourceTree = "<group>"; }; 3873 86C568DD11A213EE0007F7F0 /* MacroAssemblerARM.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MacroAssemblerARM.cpp; sourceTree = "<group>"; };3874 3871 86C568DE11A213EE0007F7F0 /* MacroAssemblerMIPS.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MacroAssemblerMIPS.h; sourceTree = "<group>"; }; 3875 3872 86C568DF11A213EE0007F7F0 /* MIPSAssembler.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MIPSAssembler.h; sourceTree = "<group>"; }; … … 3879 3876 86CCEFDD0F413F8900FD7F9E /* JITCode.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = JITCode.h; sourceTree = "<group>"; }; 3880 3877 86D22219167EF9440024C804 /* testapi.mm */ = {isa = PBXFileReference; explicitFileType = sourcecode.cpp.objcpp; fileEncoding = 4; name = testapi.mm; path = API/tests/testapi.mm; sourceTree = "<group>"; }; 3881 86D3B2BF10156BDE002865E7 /* ARMAssembler.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = ARMAssembler.cpp; sourceTree = "<group>"; };3882 86D3B2C010156BDE002865E7 /* ARMAssembler.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ARMAssembler.h; sourceTree = "<group>"; };3883 3878 86D3B2C110156BDE002865E7 /* AssemblerBufferWithConstantPool.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = AssemblerBufferWithConstantPool.h; sourceTree = "<group>"; }; 3884 86D3B2C210156BDE002865E7 /* MacroAssemblerARM.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MacroAssemblerARM.h; sourceTree = "<group>"; };3885 3879 86D3B3C110159D7F002865E7 /* LinkBuffer.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = LinkBuffer.h; sourceTree = "<group>"; }; 3886 3880 86E116B00FE75AC800B512BC /* CodeLocation.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = CodeLocation.h; sourceTree = "<group>"; }; … … 7622 7616 AD412B351E7B57C0008AF157 /* AllowMacroScratchRegisterUsageIf.h */, 7623 7617 8640923B156EED3B00566CB2 /* ARM64Assembler.h */, 7624 86D3B2BF10156BDE002865E7 /* ARMAssembler.cpp */,7625 86D3B2C010156BDE002865E7 /* ARMAssembler.h */,7626 7618 86ADD1430FDDEA980006EEC2 /* ARMv7Assembler.h */, 7627 7619 9688CB130ED12B4E001D649F /* AssemblerBuffer.h */, … … 7635 7627 0FEB3ECE16237F6700AB67AD /* MacroAssembler.cpp */, 7636 7628 86C36EE90EE1289D00B3DF59 /* MacroAssembler.h */, 7637 86C568DD11A213EE0007F7F0 /* MacroAssemblerARM.cpp */,7638 86D3B2C210156BDE002865E7 /* MacroAssemblerARM.h */,7639 7629 FEB137561BB11EEE00CD5100 /* MacroAssemblerARM64.cpp */, 7640 7630 8640923C156EED3B00566CB2 /* MacroAssemblerARM64.h */, … … 8372 8362 0F6B1CB91861244C00845D97 /* ArityCheckMode.h in Headers */, 8373 8363 A1A009C11831A26E00CF8711 /* ARM64Assembler.h in Headers */, 8374 86D3B2C410156BDE002865E7 /* ARMAssembler.h in Headers */,8375 8364 86ADD1450FDDEA980006EEC2 /* ARMv7Assembler.h in Headers */, 8376 8365 0F8335B81639C1EA001443B5 /* ArrayAllocationProfile.h in Headers */, … … 9358 9347 14B723B812D7DA6F003BD5ED /* MachineStackMarker.h in Headers */, 9359 9348 86C36EEA0EE1289D00B3DF59 /* MacroAssembler.h in Headers */, 9360 86D3B2C610156BDE002865E7 /* MacroAssemblerARM.h in Headers */,9361 9349 A1A009C01831A22D00CF8711 /* MacroAssemblerARM64.h in Headers */, 9362 9350 86ADD1460FDDEA980006EEC2 /* MacroAssemblerARMv7.h in Headers */, -
trunk/Source/JavaScriptCore/Sources.txt
r238192 r238439 42 42 API/OpaqueJSString.cpp 43 43 44 assembler/ARMAssembler.cpp45 44 assembler/AbstractMacroAssembler.cpp 46 45 assembler/LinkBuffer.cpp 47 46 assembler/MacroAssembler.cpp 48 assembler/MacroAssemblerARM.cpp49 47 assembler/MacroAssemblerARM64.cpp 50 48 assembler/MacroAssemblerARMv7.cpp -
trunk/Source/JavaScriptCore/assembler/LinkBuffer.cpp
r236883 r238439 299 299 AssemblerBuffer& buffer = macroAssembler.m_assembler.buffer(); 300 300 void* code = m_code.dataLocation(); 301 #if CPU(ARM_TRADITIONAL) 302 macroAssembler.m_assembler.prepareExecutableCopy(code); 303 #elif CPU(ARM64) 301 #if CPU(ARM64) 304 302 RELEASE_ASSERT(roundUpToMultipleOf<Assembler::instructionSize>(code) == code); 305 303 #endif … … 401 399 for (unsigned i = 0; i < tsize; i++) 402 400 dataLogF("\t.short\t0x%x\n", tcode[i]); 403 #elif CPU(ARM_TRADITIONAL)404 // gcc -c jit.s405 // objdump -D jit.o406 static unsigned codeCount = 0;407 unsigned int* tcode = static_cast<unsigned int*>(code);408 size_t tsize = size / sizeof(unsigned int);409 char nameBuf[128];410 snprintf(nameBuf, sizeof(nameBuf), "_jsc_jit%u", codeCount++);411 dataLogF("\t.globl\t%s\n"412 "\t.align 4\n"413 "\t.code 32\n"414 "\t.text\n"415 "# %p\n"416 "%s:\n", nameBuf, code, nameBuf);417 418 for (unsigned i = 0; i < tsize; i++)419 dataLogF("\t.long\t0x%x\n", tcode[i]);420 401 #endif 421 402 } -
trunk/Source/JavaScriptCore/assembler/MacroAssembler.h
r237173 r238439 46 46 #include "MacroAssemblerARM64.h" 47 47 48 #elif CPU(ARM_TRADITIONAL)49 #define TARGET_ASSEMBLER ARMAssembler50 #define TARGET_MACROASSEMBLER MacroAssemblerARM51 #include "MacroAssemblerARM.h"52 53 48 #elif CPU(MIPS) 54 49 #define TARGET_ASSEMBLER MIPSAssembler … … 143 138 using MacroAssemblerBase::branchAdd32; 144 139 using MacroAssemblerBase::branchMul32; 145 #if CPU(ARM64) || CPU(ARM_THUMB2) || CPU( ARM_TRADITIONAL) || CPU(X86_64) || CPU(MIPS)140 #if CPU(ARM64) || CPU(ARM_THUMB2) || CPU(X86_64) || CPU(MIPS) 146 141 using MacroAssemblerBase::branchPtr; 147 142 #endif … … 435 430 } 436 431 437 #if !CPU(ARM_TRADITIONAL)438 432 PatchableJump patchableJump() 439 433 { … … 460 454 return PatchableJump(branch32(cond, address, imm)); 461 455 } 462 #endif463 456 #endif 464 457 -
trunk/Source/JavaScriptCore/assembler/PerfLog.cpp
r236883 r238439 31 31 #include <elf.h> 32 32 #include <fcntl.h> 33 #include <mutex> 33 34 #include <sys/mman.h> 34 35 #include <sys/stat.h> … … 36 37 #include <sys/types.h> 37 38 #include <unistd.h> 39 #include <wtf/DataLog.h> 38 40 #include <wtf/MonotonicTime.h> 39 41 #include <wtf/PageBlock.h> -
trunk/Source/JavaScriptCore/assembler/PerfLog.h
r236883 r238439 30 30 #include <stdio.h> 31 31 #include <wtf/Lock.h> 32 #include <wtf/text/CString.h> 32 33 33 34 namespace JSC { -
trunk/Source/JavaScriptCore/assembler/ProbeContext.h
r237173 r238439 113 113 #elif CPU(ARM64) 114 114 return *reinterpret_cast<void**>(&spr(ARM64Registers::pc)); 115 #elif CPU(ARM_THUMB2) || CPU(ARM_TRADITIONAL)115 #elif CPU(ARM_THUMB2) 116 116 return *reinterpret_cast<void**>(&gpr(ARMRegisters::pc)); 117 117 #elif CPU(MIPS) … … 128 128 #elif CPU(ARM64) 129 129 return *reinterpret_cast<void**>(&gpr(ARM64Registers::fp)); 130 #elif CPU(ARM_THUMB2) || CPU(ARM_TRADITIONAL)130 #elif CPU(ARM_THUMB2) 131 131 return *reinterpret_cast<void**>(&gpr(ARMRegisters::fp)); 132 132 #elif CPU(MIPS) … … 143 143 #elif CPU(ARM64) 144 144 return *reinterpret_cast<void**>(&gpr(ARM64Registers::sp)); 145 #elif CPU(ARM_THUMB2) || CPU(ARM_TRADITIONAL)145 #elif CPU(ARM_THUMB2) 146 146 return *reinterpret_cast<void**>(&gpr(ARMRegisters::sp)); 147 147 #elif CPU(MIPS) -
trunk/Source/JavaScriptCore/assembler/testmasm.cpp
r237080 r238439 112 112 bool isPC(MacroAssembler::RegisterID id) 113 113 { 114 #if CPU(ARM_THUMB2) || CPU(ARM_TRADITIONAL)114 #if CPU(ARM_THUMB2) 115 115 return id == ARMRegisters::pc; 116 116 #else … … 574 574 auto flagsSPR = X86Registers::eflags; 575 575 uintptr_t flagsMask = 0xc5; 576 #elif CPU(ARM_THUMB2) || CPU(ARM_TRADITIONAL)576 #elif CPU(ARM_THUMB2) 577 577 auto flagsSPR = ARMRegisters::apsr; 578 578 uintptr_t flagsMask = 0xf8000000; … … 754 754 MacroAssembler::SPRegisterID flagsSPR = X86Registers::eflags; 755 755 uintptr_t flagsMask = 0xc5; 756 #elif CPU(ARM_THUMB2) || CPU(ARM_TRADITIONAL)756 #elif CPU(ARM_THUMB2) 757 757 MacroAssembler::SPRegisterID flagsSPR = ARMRegisters::apsr; 758 758 uintptr_t flagsMask = 0xf8000000; -
trunk/Source/JavaScriptCore/bytecode/InlineAccess.h
r235517 r238439 50 50 #elif CPU(ARM64) 51 51 return 40; 52 #elif CPU(ARM) 53 #if CPU(ARM_THUMB2) 52 #elif CPU(ARM_THUMB2) 54 53 return 48; 55 #else56 return 52;57 #endif58 54 #elif CPU(MIPS) 59 55 return 72; … … 72 68 #elif CPU(ARM64) 73 69 return 40; 74 #elif CPU(ARM) 75 #if CPU(ARM_THUMB2) 70 #elif CPU(ARM_THUMB2) 76 71 return 48; 77 #else78 return 48;79 #endif80 72 #elif CPU(MIPS) 81 73 return 72; … … 97 89 #elif CPU(ARM64) 98 90 size_t size = 32; 99 #elif CPU(ARM) 100 #if CPU(ARM_THUMB2) 91 #elif CPU(ARM_THUMB2) 101 92 size_t size = 30; 102 #else103 size_t size = 32;104 #endif105 93 #elif CPU(MIPS) 106 94 size_t size = 56; -
trunk/Source/JavaScriptCore/dfg/DFGSpeculativeJIT.h
r237285 r238439 984 984 } 985 985 986 #if !defined(NDEBUG) && !CPU(ARM ) && !CPU(MIPS)986 #if !defined(NDEBUG) && !CPU(ARM_THUMB2) && !CPU(MIPS) 987 987 void prepareForExternalCall() 988 988 { … … 1060 1060 return call; 1061 1061 } 1062 #elif CPU(ARM ) && !CPU(ARM_HARDFP)1062 #elif CPU(ARM_THUMB2) && !CPU(ARM_HARDFP) 1063 1063 JITCompiler::Call appendCallSetResult(const FunctionPtr<CFunctionPtrTag> function, FPRReg result) 1064 1064 { … … 1068 1068 return call; 1069 1069 } 1070 #else // CPU(X86_64) || (CPU(ARM ) && CPU(ARM_HARDFP)) || CPU(ARM64) || CPU(MIPS)1070 #else // CPU(X86_64) || (CPU(ARM_THUMB2) && CPU(ARM_HARDFP)) || CPU(ARM64) || CPU(MIPS) 1071 1071 JITCompiler::Call appendCallSetResult(const FunctionPtr<CFunctionPtrTag> function, FPRReg result) 1072 1072 { -
trunk/Source/JavaScriptCore/disassembler/CapstoneDisassembler.cpp
r236768 r238439 45 45 if (cs_open(CS_ARCH_X86, CS_MODE_64, &handle) != CS_ERR_OK) 46 46 return false; 47 #elif CPU(ARM_TRADITIONAL)48 if (cs_open(CS_ARCH_ARM, CS_MODE_ARM, &handle) != CS_ERR_OK)49 return false;50 47 #elif CPU(ARM_THUMB2) 51 48 if (cs_open(CS_ARCH_ARM, CS_MODE_THUMB, &handle) != CS_ERR_OK) -
trunk/Source/JavaScriptCore/jit/AssemblyHelpers.cpp
r236734 r238439 983 983 storePtr(TrustedImmPtr(scratchSize), GPRInfo::regT0); 984 984 985 #if CPU(X86_64) || CPU(ARM ) || CPU(ARM64) || CPU(MIPS)985 #if CPU(X86_64) || CPU(ARM_THUMB2) || CPU(ARM64) || CPU(MIPS) 986 986 move(TrustedImmPtr(buffer), GPRInfo::argumentGPR2); 987 987 move(TrustedImmPtr(argument), GPRInfo::argumentGPR1); -
trunk/Source/JavaScriptCore/jit/AssemblyHelpers.h
r237173 r238439 522 522 #endif // CPU(X86_64) || CPU(X86) 523 523 524 #if CPU(ARM ) || CPU(ARM64)524 #if CPU(ARM_THUMB2) || CPU(ARM64) 525 525 static size_t prologueStackPointerDelta() 526 526 { -
trunk/Source/JavaScriptCore/jit/CCallHelpers.h
r237051 r238439 184 184 } 185 185 186 #if CPU(MIPS) || (CPU(ARM ) && !CPU(ARM_HARDFP))186 #if CPU(MIPS) || (CPU(ARM_THUMB2) && !CPU(ARM_HARDFP)) 187 187 template<unsigned NumCrossSources, unsigned NumberOfRegisters> 188 188 ALWAYS_INLINE void setupStubCrossArgs(std::array<GPRReg, NumberOfRegisters> destinations, std::array<FPRReg, NumberOfRegisters> sources) { … … 449 449 } 450 450 451 #elif CPU(ARM ) || CPU(MIPS)451 #elif CPU(ARM_THUMB2) || CPU(MIPS) 452 452 453 453 template<typename OperationType, unsigned numGPRArgs, unsigned numGPRSources, unsigned numFPRArgs, unsigned numFPRSources, unsigned numCrossSources, unsigned extraGPRArgs, unsigned extraPoke, typename... Args> … … 467 467 return; 468 468 } 469 #elif CPU(ARM ) && CPU(ARM_HARDFP)469 #elif CPU(ARM_THUMB2) && CPU(ARM_HARDFP) 470 470 unsigned numberOfFPArgumentRegisters = FPRInfo::numberOfArgumentRegisters; 471 471 unsigned currentFPArgCount = argSourceRegs.argCount(arg); … … 478 478 #endif 479 479 480 #if CPU(MIPS) || (CPU(ARM ) && !CPU(ARM_HARDFP))480 #if CPU(MIPS) || (CPU(ARM_THUMB2) && !CPU(ARM_HARDFP)) 481 481 // On MIPS and ARM-softfp FP arguments can be passed in GP registers. 482 482 unsigned numberOfGPArgumentRegisters = GPRInfo::numberOfArgumentRegisters; … … 593 593 } 594 594 595 #endif // CPU(ARM ) || CPU(MIPS)595 #endif // CPU(ARM_THUMB2) || CPU(MIPS) 596 596 #endif // USE(JSVALUE64) 597 597 … … 674 674 #endif 675 675 setupStubArgs<numGPRSources, GPRReg>(clampArrayToSize<numGPRSources, GPRReg>(argSourceRegs.gprDestinations), clampArrayToSize<numGPRSources, GPRReg>(argSourceRegs.gprSources)); 676 #if CPU(MIPS) || (CPU(ARM ) && !CPU(ARM_HARDFP))676 #if CPU(MIPS) || (CPU(ARM_THUMB2) && !CPU(ARM_HARDFP)) 677 677 setupStubCrossArgs<numCrossSources>(argSourceRegs.crossDestinations, argSourceRegs.crossSources); 678 678 #else … … 803 803 // We don't need the current frame beyond this point. Masquerade as our 804 804 // caller. 805 #if CPU(ARM ) || CPU(ARM64)805 #if CPU(ARM_THUMB2) || CPU(ARM64) 806 806 loadPtr(Address(framePointerRegister, CallFrame::returnPCOffset()), linkRegister); 807 807 subPtr(TrustedImm32(2 * sizeof(void*)), newFrameSizeGPR); -
trunk/Source/JavaScriptCore/jit/CallFrameShuffler.cpp
r230129 r238439 384 384 // manually 385 385 m_newFrameOffset = 0; 386 #elif CPU(ARM ) || CPU(MIPS)386 #elif CPU(ARM_THUMB2) || CPU(MIPS) 387 387 // We load the frame pointer and link register 388 388 // manually. We could ask the algorithm to load them for us, … … 446 446 447 447 // We load the link register manually for architectures that have one 448 #if CPU(ARM ) || CPU(ARM64)448 #if CPU(ARM_THUMB2) || CPU(ARM64) 449 449 m_jit.loadPtr(MacroAssembler::Address(MacroAssembler::framePointerRegister, CallFrame::returnPCOffset()), 450 450 MacroAssembler::linkRegister); -
trunk/Source/JavaScriptCore/jit/HostCallReturnValue.cpp
r236450 r238439 86 86 ); 87 87 88 #elif COMPILER(GCC_COMPATIBLE) && CPU(ARM_TRADITIONAL)89 asm (90 ".text" "\n"91 ".globl " SYMBOL_STRING(getHostCallReturnValue) "\n"92 HIDE_SYMBOL(getHostCallReturnValue) "\n"93 INLINE_ARM_FUNCTION(getHostCallReturnValue)94 SYMBOL_STRING(getHostCallReturnValue) ":" "\n"95 "sub r0, sp, #8" "\n"96 "b " LOCAL_REFERENCE(getHostCallReturnValueWithExecState) "\n"97 );98 99 88 #elif CPU(ARM64) 100 89 asm ( -
trunk/Source/JavaScriptCore/jit/JITMathIC.h
r237547 r238439 69 69 bool generateInline(CCallHelpers& jit, MathICGenerationState& state, bool shouldEmitProfiling = true) 70 70 { 71 #if CPU(ARM_TRADITIONAL)72 // FIXME: Remove this workaround once the proper fixes are landed.73 // [ARM] Disable Inline Caching on ARMv7 traditional until proper fix74 // https://bugs.webkit.org/show_bug.cgi?id=15975975 return false;76 #endif77 78 71 state.fastPathStart = jit.label(); 79 72 size_t startSize = jit.m_assembler.buffer().codeSize(); -
trunk/Source/JavaScriptCore/jit/RegisterSet.cpp
r238414 r238439 52 52 return RegisterSet(ARM64Registers::lr); 53 53 #endif // PLATFORM(IOS_FAMILY) 54 #elif CPU(ARM_THUMB2) || CPU(ARM_TRADITIONAL)54 #elif CPU(ARM_THUMB2) 55 55 return RegisterSet(ARMRegisters::lr, ARMRegisters::pc); 56 56 #else … … 136 136 result.set(ARMRegisters::r9); 137 137 #endif 138 result.set(ARMRegisters::r10);139 result.set(ARMRegisters::r11);140 #elif CPU(ARM_TRADITIONAL)141 result.set(ARMRegisters::r4);142 result.set(ARMRegisters::r5);143 result.set(ARMRegisters::r6);144 result.set(ARMRegisters::r7);145 result.set(ARMRegisters::r8);146 result.set(ARMRegisters::r9);147 138 result.set(ARMRegisters::r10); 148 139 result.set(ARMRegisters::r11); … … 240 231 #elif CPU(ARM_THUMB2) 241 232 result.set(GPRInfo::regCS0); 242 #elif CPU(ARM_TRADITIONAL)243 233 #elif CPU(ARM64) 244 234 result.set(GPRInfo::regCS6); … … 277 267 #endif 278 268 #elif CPU(ARM_THUMB2) 279 #elif CPU(ARM_TRADITIONAL)280 269 #elif CPU(ARM64) 281 270 ASSERT(GPRInfo::regCS8 == GPRInfo::tagTypeNumberRegister); -
trunk/Source/JavaScriptCore/jit/Repatch.cpp
r235517 r238439 131 131 static bool forceICFailure(ExecState*) 132 132 { 133 #if CPU(ARM_TRADITIONAL)134 // FIXME: Remove this workaround once the proper fixes are landed.135 // [ARM] Disable Inline Caching on ARMv7 traditional until proper fix136 // https://bugs.webkit.org/show_bug.cgi?id=159759137 return true;138 #else139 133 return Options::forceICFailure(); 140 #endif141 134 } 142 135 -
trunk/Source/JavaScriptCore/jit/ThunkGenerators.cpp
r237266 r238439 351 351 jit.call(ARM64Registers::x2, JSEntryPtrTag); 352 352 353 #elif CPU(ARM ) || CPU(MIPS)353 #elif CPU(ARM_THUMB2) || CPU(MIPS) 354 354 #if CPU(MIPS) 355 355 // Allocate stack space for (unused) 16 bytes (8-byte aligned) for 4 arguments. -
trunk/Source/JavaScriptCore/llint/LLIntOfflineAsmConfig.h
r237173 r238439 35 35 #define OFFLINE_ASM_X86 0 36 36 #define OFFLINE_ASM_X86_WIN 0 37 #define OFFLINE_ASM_ARM 038 37 #define OFFLINE_ASM_ARMv7 0 39 #define OFFLINE_ASM_ARMv7_TRADITIONAL 040 38 #define OFFLINE_ASM_ARM64 0 41 39 #define OFFLINE_ASM_ARM64E 0 … … 78 76 #else 79 77 #define OFFLINE_ASM_ARMv7 0 80 #endif81 82 #if CPU(ARM_TRADITIONAL)83 #if WTF_ARM_ARCH_AT_LEAST(7)84 #define OFFLINE_ASM_ARMv7_TRADITIONAL 185 #define OFFLINE_ASM_ARM 086 #else87 #define OFFLINE_ASM_ARM 188 #define OFFLINE_ASM_ARMv7_TRADITIONAL 089 #endif90 #else91 #define OFFLINE_ASM_ARMv7_TRADITIONAL 092 #define OFFLINE_ASM_ARM 093 78 #endif 94 79 -
trunk/Source/JavaScriptCore/llint/LowLevelInterpreter.asm
r238414 r238439 72 72 # registers on all architectures. 73 73 # 74 # - lr is defined on non-X86 architectures (ARM64, ARM64E, ARMv7, ARM, 75 # ARMv7_TRADITIONAL, MIPS and CLOOP) and holds the return PC 76 # 77 # - pc holds the (native) program counter on 32-bits ARM architectures (ARM, 78 # ARMv7, ARMv7_TRADITIONAL) 74 # - lr is defined on non-X86 architectures (ARM64, ARM64E, ARMv7, MIPS and CLOOP) 75 # and holds the return PC 76 # 77 # - pc holds the (native) program counter on 32-bits ARM architectures (ARMv7) 79 78 # 80 79 # - t0, t1, t2, t3, t4 and optionally t5 are temporary registers that can get trashed on … … 613 612 # improvement from avoiding useless work. 614 613 else 615 if ARM or ARMv7 or ARMv7_TRADITIONAL614 if ARMv7 616 615 # ARM can't do logical ops with the sp as a source 617 616 move sp, tempReg … … 630 629 if C_LOOP or ARM64 or ARM64E or X86_64 or X86_64_WIN 631 630 const CalleeSaveRegisterCount = 0 632 elsif ARM or ARMv7_TRADITIONAL or ARMv7631 elsif ARMv7 633 632 const CalleeSaveRegisterCount = 7 634 633 elsif MIPS … … 646 645 macro pushCalleeSaves() 647 646 if C_LOOP or ARM64 or ARM64E or X86_64 or X86_64_WIN 648 elsif ARM or ARMv7_TRADITIONAL649 emit "push {r4-r10}"650 647 elsif ARMv7 651 648 emit "push {r4-r6, r8-r11}" … … 668 665 macro popCalleeSaves() 669 666 if C_LOOP or ARM64 or ARM64E or X86_64 or X86_64_WIN 670 elsif ARM or ARMv7_TRADITIONAL671 emit "pop {r4-r10}"672 667 elsif ARMv7 673 668 emit "pop {r4-r6, r8-r11}" … … 687 682 688 683 macro preserveCallerPCAndCFR() 689 if C_LOOP or ARM or ARMv7 or ARMv7_TRADITIONALor MIPS684 if C_LOOP or ARMv7 or MIPS 690 685 push lr 691 686 push cfr … … 702 697 macro restoreCallerPCAndCFR() 703 698 move cfr, sp 704 if C_LOOP or ARM or ARMv7 or ARMv7_TRADITIONALor MIPS699 if C_LOOP or ARMv7 or MIPS 705 700 pop cfr 706 701 pop lr … … 716 711 if C_LOOP 717 712 storep metadataTable, -PtrSize[cfr] 718 elsif ARM or ARMv7_TRADITIONAL719 713 elsif ARMv7 720 714 storep metadataTable, -4[cfr] … … 741 735 if C_LOOP 742 736 loadp -PtrSize[cfr], metadataTable 743 elsif ARM or ARMv7_TRADITIONAL744 737 elsif ARMv7 745 738 loadp -4[cfr], metadataTable … … 852 845 853 846 macro preserveReturnAddressAfterCall(destinationRegister) 854 if C_LOOP or ARM or ARMv7 or ARMv7_TRADITIONALor ARM64 or ARM64E or MIPS847 if C_LOOP or ARMv7 or ARM64 or ARM64E or MIPS 855 848 # In C_LOOP case, we're only preserving the bytecode vPC. 856 849 move lr, destinationRegister … … 875 868 elsif ARM64 or ARM64E 876 869 push cfr, lr 877 elsif C_LOOP or ARM or ARMv7 or ARMv7_TRADITIONALor MIPS870 elsif C_LOOP or ARMv7 or MIPS 878 871 push lr 879 872 push cfr … … 887 880 elsif ARM64 or ARM64E 888 881 pop lr, cfr 889 elsif C_LOOP or ARM or ARMv7 or ARMv7_TRADITIONALor MIPS882 elsif C_LOOP or ARMv7 or MIPS 890 883 pop cfr 891 884 pop lr … … 959 952 andi ~StackAlignmentMask, temp2 960 953 961 if ARM or ARMv7_TRADITIONAL or ARMv7 or ARM64 or ARM64E or C_LOOP or MIPS954 if ARMv7 or ARM64 or ARM64E or C_LOOP or MIPS 962 955 addp CallerFrameAndPCSize, sp 963 956 subi CallerFrameAndPCSize, temp2 … … 1118 1111 pop lr, cfr 1119 1112 untagReturnAddress sp 1120 elsif ARM or ARMv7 or ARMv7_TRADITIONALor MIPS1113 elsif ARMv7 or MIPS 1121 1114 pop cfr 1122 1115 pop lr … … 1325 1318 move pc, pcBase 1326 1319 subp 3, pcBase # Need to back up the PC and set the Thumb2 bit 1327 elsif ARM or ARMv7_TRADITIONAL1328 _relativePCBase:1329 move pc, pcBase1330 subp 8, pcBase1331 1320 elsif MIPS 1332 1321 la _relativePCBase, pcBase … … 1359 1348 move index, t4 1360 1349 storep t2, [map, t4, PtrSize] 1361 elsif ARM or ARMv7 or ARMv7_TRADITIONAL1350 elsif ARMv7 1362 1351 mvlbl (label - _relativePCBase), t4 1363 1352 addp t4, t2, t4 -
trunk/Source/JavaScriptCore/llint/LowLevelInterpreter32_64.asm
r238435 r238439 89 89 90 90 macro cCall2(function) 91 if ARM or ARMv7 or ARMv7_TRADITIONALor MIPS91 if ARMv7 or MIPS 92 92 call function 93 93 elsif X86 or X86_WIN … … 113 113 114 114 macro cCall4(function) 115 if ARM or ARMv7 or ARMv7_TRADITIONALor MIPS115 if ARMv7 or MIPS 116 116 call function 117 117 elsif X86 or X86_WIN … … 175 175 andp ~StackAlignmentMask, t3 176 176 subp t3, CallFrameAlignSlots * SlotSize, sp 177 elsif ARM or ARMv7 or ARMv7_TRADITIONAL177 elsif ARMv7 178 178 addp CallFrameAlignSlots * SlotSize, sp, t3 179 179 clrbp t3, StackAlignmentMask, t3 180 if ARMv7 181 subp t3, CallFrameAlignSlots * SlotSize, t3 182 move t3, sp 183 else 184 subp t3, CallFrameAlignSlots * SlotSize, sp 185 end 180 subp t3, CallFrameAlignSlots * SlotSize, t3 181 move t3, sp 186 182 end 187 183 … … 2036 2032 loadp MarkedBlockFooterOffset + MarkedBlock::Footer::m_vm[t3], t3 2037 2033 addp 8, sp 2038 elsif ARM or ARMv7 or ARMv7_TRADITIONALor C_LOOP or MIPS2034 elsif ARMv7 or C_LOOP or MIPS 2039 2035 if MIPS 2040 2036 # calling convention says to save stack space for 4 first registers in … … 2103 2099 loadp MarkedBlockFooterOffset + MarkedBlock::Footer::m_vm[t3], t3 2104 2100 addp 8, sp 2105 elsif ARM or ARMv7 or ARMv7_TRADITIONALor C_LOOP or MIPS2101 elsif ARMv7 or C_LOOP or MIPS 2106 2102 subp 8, sp # align stack pointer 2107 2103 # t1 already contains the Callee. -
trunk/Source/JavaScriptCore/offlineasm/arm.rb
r237803 r238439 60 60 when "ARMv7" 61 61 true 62 when "ARMv7_TRADITIONAL", "ARM"63 false64 else65 raise "bad value for $activeBackend: #{$activeBackend}"66 end67 end68 69 def isARMv7Traditional70 case $activeBackend71 when "ARMv7_TRADITIONAL"72 true73 when "ARMv7", "ARM"74 false75 62 else 76 63 raise "bad value for $activeBackend: #{$activeBackend}" … … 105 92 elsif (~value) >= 0 && (~value) < 256 106 93 $asm.puts "mvn #{register.armOperand}, \##{~value}" 107 elsif isARMv7 or isARMv7Traditional94 elsif isARMv7 108 95 $asm.puts "movw #{register.armOperand}, \##{value & 0xffff}" 109 96 if (value & 0xffff0000) != 0 … … 302 289 303 290 class Sequence 304 def getModifiedListARM305 raise unless $activeBackend == "ARM"306 getModifiedListARMCommon307 end308 309 291 def getModifiedListARMv7 310 292 raise unless $activeBackend == "ARMv7" 311 getModifiedListARMCommon312 end313 314 def getModifiedListARMv7_TRADITIONAL315 raise unless $activeBackend == "ARMv7_TRADITIONAL"316 293 getModifiedListARMCommon 317 294 end … … 415 392 416 393 class Instruction 417 def lowerARM418 raise unless $activeBackend == "ARM"419 lowerARMCommon420 end421 422 394 def lowerARMv7 423 395 raise unless $activeBackend == "ARMv7" 424 lowerARMCommon425 end426 427 def lowerARMv7_TRADITIONAL428 raise unless $activeBackend == "ARMv7_TRADITIONAL"429 396 lowerARMCommon 430 397 end -
trunk/Source/JavaScriptCore/offlineasm/backends.rb
r237173 r238439 41 41 "X86_64", 42 42 "X86_64_WIN", 43 "ARM",44 43 "ARMv7", 45 "ARMv7_TRADITIONAL",46 44 "ARM64", 47 45 "ARM64E", … … 61 59 "X86_64", 62 60 "X86_64_WIN", 63 "ARM",64 61 "ARMv7", 65 "ARMv7_TRADITIONAL",66 62 "ARM64", 67 63 "ARM64E", -
trunk/Source/JavaScriptCore/yarr/YarrJIT.cpp
r235648 r238439 44 44 class YarrGenerator : public YarrJITInfo, private MacroAssembler { 45 45 46 #if CPU(ARM )46 #if CPU(ARM_THUMB2) 47 47 static const RegisterID input = ARMRegisters::r0; 48 48 static const RegisterID index = ARMRegisters::r1; … … 3724 3724 zeroExtend32ToPtr(index, index); 3725 3725 zeroExtend32ToPtr(length, length); 3726 #elif CPU(ARM )3726 #elif CPU(ARM_THUMB2) 3727 3727 push(ARMRegisters::r4); 3728 3728 push(ARMRegisters::r5); … … 3777 3777 if (m_decodeSurrogatePairs) 3778 3778 popPair(framePointerRegister, linkRegister); 3779 #elif CPU(ARM )3779 #elif CPU(ARM_THUMB2) 3780 3780 pop(ARMRegisters::r8); 3781 3781 pop(ARMRegisters::r6); -
trunk/Source/WTF/ChangeLog
r238434 r238439 1 2018-11-21 Yusuke Suzuki <yusukesuzuki@slowstart.org> 2 3 [JSC] Drop ARM_TRADITIONAL support in LLInt, baseline JIT, and DFG 4 https://bugs.webkit.org/show_bug.cgi?id=191675 5 6 Reviewed by Mark Lam. 7 8 * wtf/InlineASM.h: 9 * wtf/Platform.h: 10 1 11 2018-11-21 Andy Estes <aestes@apple.com> 2 12 -
trunk/Source/WTF/wtf/InlineASM.h
r237266 r238439 94 94 #endif 95 95 96 #if (CPU(ARM_TRADITIONAL) && (defined(thumb2) || defined(__thumb2__) || defined(__thumb) || defined(__thumb__))) ||CPU(ARM_THUMB2)96 #if CPU(ARM_THUMB2) 97 97 #define INLINE_ARM_FUNCTION(name) ".thumb" "\n" ".thumb_func " THUMB_FUNC_PARAM(name) "\n" 98 98 #else -
trunk/Source/WTF/wtf/Platform.h
r238434 r238439 822 822 #define ENABLE_DFG_JIT 1 823 823 #endif 824 /* Enable the DFG JIT on ARM. */825 #if CPU(ARM_TRADITIONAL)826 #define ENABLE_DFG_JIT 1827 #endif828 824 /* Enable the DFG JIT on MIPS. */ 829 825 #if CPU(MIPS) … … 848 844 #endif 849 845 850 #if CPU(X86) || CPU(X86_64) || CPU(ARM_THUMB2) || CPU(ARM64) || CPU( ARM_TRADITIONAL) || CPU(MIPS)846 #if CPU(X86) || CPU(X86_64) || CPU(ARM_THUMB2) || CPU(ARM64) || CPU(MIPS) 851 847 #define ENABLE_MASM_PROBE 1 852 848 #else
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