Changeset 52729 in webkit
- Timestamp:
- Jan 4, 2010 3:38:56 AM (14 years ago)
- Location:
- trunk
- Files:
-
- 42 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/JavaScriptCore/ChangeLog
r52711 r52729 1 2010-01-04 Maciej Stachowiak <mjs@apple.com> 2 3 Reviewed by Adam Barth. 4 5 Reorganize, document and rename CPU() platform macros. 6 https://bugs.webkit.org/show_bug.cgi?id=33145 7 ExecutableAllocatorSymbian appears to have buggy ARM version check 8 https://bugs.webkit.org/show_bug.cgi?id=33138 9 10 * wtf/Platform.h: 11 Rename all macros related to detection of particular CPUs or 12 classes of CPUs to CPU(), reorganize and document them. 13 14 All remaining changes are adapting to the renames, plus fixing the 15 second bug cited above. 16 17 * assembler/ARMAssembler.cpp: 18 * assembler/ARMAssembler.h: 19 * assembler/ARMv7Assembler.h: 20 * assembler/AbstractMacroAssembler.h: 21 (JSC::AbstractMacroAssembler::Imm32::Imm32): 22 * assembler/MacroAssembler.h: 23 * assembler/MacroAssemblerARM.cpp: 24 * assembler/MacroAssemblerARM.h: 25 * assembler/MacroAssemblerCodeRef.h: 26 (JSC::MacroAssemblerCodePtr::MacroAssemblerCodePtr): 27 * assembler/MacroAssemblerX86.h: 28 * assembler/MacroAssemblerX86Common.h: 29 * assembler/MacroAssemblerX86_64.h: 30 * assembler/X86Assembler.h: 31 (JSC::X86Registers::): 32 (JSC::X86Assembler::): 33 (JSC::X86Assembler::movl_mEAX): 34 (JSC::X86Assembler::movl_EAXm): 35 (JSC::X86Assembler::repatchLoadPtrToLEA): 36 (JSC::X86Assembler::X86InstructionFormatter::memoryModRM): 37 * jit/ExecutableAllocator.h: 38 * jit/ExecutableAllocatorFixedVMPool.cpp: 39 * jit/ExecutableAllocatorPosix.cpp: 40 * jit/ExecutableAllocatorSymbian.cpp: 41 (JSC::ExecutableAllocator::intializePageSize): 42 * jit/JIT.cpp: 43 * jit/JIT.h: 44 * jit/JITArithmetic.cpp: 45 * jit/JITInlineMethods.h: 46 (JSC::JIT::beginUninterruptedSequence): 47 (JSC::JIT::restoreArgumentReferenceForTrampoline): 48 (JSC::JIT::emitCount): 49 * jit/JITOpcodes.cpp: 50 (JSC::JIT::privateCompileCTIMachineTrampolines): 51 * jit/JITPropertyAccess.cpp: 52 (JSC::JIT::privateCompileGetByIdProto): 53 (JSC::JIT::privateCompileGetByIdProtoList): 54 (JSC::JIT::privateCompileGetByIdChainList): 55 (JSC::JIT::privateCompileGetByIdChain): 56 * jit/JITStubs.cpp: 57 (JSC::JITThunks::JITThunks): 58 * jit/JITStubs.h: 59 * runtime/Collector.cpp: 60 (JSC::currentThreadStackBase): 61 (JSC::getPlatformThreadRegisters): 62 (JSC::otherThreadStackPointer): 63 * wrec/WREC.h: 64 * wrec/WRECGenerator.cpp: 65 (JSC::WREC::Generator::generateEnter): 66 (JSC::WREC::Generator::generateReturnSuccess): 67 (JSC::WREC::Generator::generateReturnFailure): 68 * wrec/WRECGenerator.h: 69 * wtf/FastMalloc.cpp: 70 * wtf/TCSpinLock.h: 71 (TCMalloc_SpinLock::Lock): 72 (TCMalloc_SpinLock::Unlock): 73 (TCMalloc_SlowLock): 74 * wtf/Threading.h: 75 * wtf/dtoa.cpp: 76 * yarr/RegexJIT.cpp: 77 (JSC::Yarr::RegexGenerator::generateEnter): 78 (JSC::Yarr::RegexGenerator::generateReturn): 79 * yarr/RegexJIT.h: 80 1 81 2010-01-04 Maciej Stachowiak <mjs@apple.com> 2 82 -
trunk/JavaScriptCore/assembler/ARMAssembler.cpp
r50553 r52729 27 27 #include "config.h" 28 28 29 #if ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)29 #if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL) 30 30 31 31 #include "ARMAssembler.h" … … 403 403 } // namespace JSC 404 404 405 #endif // ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)405 #endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL) -
trunk/JavaScriptCore/assembler/ARMAssembler.h
r51067 r52729 30 30 #include <wtf/Platform.h> 31 31 32 #if ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)32 #if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL) 33 33 34 34 #include "AssemblerBufferWithConstantPool.h" … … 813 813 } // namespace JSC 814 814 815 #endif // ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)815 #endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL) 816 816 817 817 #endif // ARMAssembler_h -
trunk/JavaScriptCore/assembler/ARMv7Assembler.h
r50539 r52729 29 29 #include <wtf/Platform.h> 30 30 31 #if ENABLE(ASSEMBLER) && PLATFORM(ARM_THUMB2)31 #if ENABLE(ASSEMBLER) && CPU(ARM_THUMB2) 32 32 33 33 #include "AssemblerBuffer.h" … … 1833 1833 } // namespace JSC 1834 1834 1835 #endif // ENABLE(ASSEMBLER) && PLATFORM(ARM_THUMB2)1835 #endif // ENABLE(ASSEMBLER) && CPU(ARM_THUMB2) 1836 1836 1837 1837 #endif // ARMAssembler_h -
trunk/JavaScriptCore/assembler/AbstractMacroAssembler.h
r47186 r52729 174 174 explicit Imm32(int32_t value) 175 175 : m_value(value) 176 #if PLATFORM(ARM)176 #if CPU(ARM) 177 177 , m_isPointer(false) 178 178 #endif … … 180 180 } 181 181 182 #if ! PLATFORM(X86_64)182 #if !CPU(X86_64) 183 183 explicit Imm32(ImmPtr ptr) 184 184 : m_value(ptr.asIntptr()) 185 #if PLATFORM(ARM)185 #if CPU(ARM) 186 186 , m_isPointer(true) 187 187 #endif … … 191 191 192 192 int32_t m_value; 193 #if PLATFORM(ARM)193 #if CPU(ARM) 194 194 // We rely on being able to regenerate code to recover exception handling 195 195 // information. Since ARMv7 supports 16-bit immediates there is a danger -
trunk/JavaScriptCore/assembler/MacroAssembler.h
r50595 r52729 31 31 #if ENABLE(ASSEMBLER) 32 32 33 #if PLATFORM(ARM_THUMB2)33 #if CPU(ARM_THUMB2) 34 34 #include "MacroAssemblerARMv7.h" 35 35 namespace JSC { typedef MacroAssemblerARMv7 MacroAssemblerBase; }; 36 36 37 #elif PLATFORM(ARM_TRADITIONAL)37 #elif CPU(ARM_TRADITIONAL) 38 38 #include "MacroAssemblerARM.h" 39 39 namespace JSC { typedef MacroAssemblerARM MacroAssemblerBase; }; 40 40 41 #elif PLATFORM(X86)41 #elif CPU(X86) 42 42 #include "MacroAssemblerX86.h" 43 43 namespace JSC { typedef MacroAssemblerX86 MacroAssemblerBase; }; 44 44 45 #elif PLATFORM(X86_64)45 #elif CPU(X86_64) 46 46 #include "MacroAssemblerX86_64.h" 47 47 namespace JSC { typedef MacroAssemblerX86_64 MacroAssemblerBase; }; … … 61 61 using MacroAssemblerBase::branch32; 62 62 using MacroAssemblerBase::branch16; 63 #if PLATFORM(X86_64)63 #if CPU(X86_64) 64 64 using MacroAssemblerBase::branchPtr; 65 65 using MacroAssemblerBase::branchTestPtr; … … 134 134 // Ptr methods 135 135 // On 32-bit platforms (i.e. x86), these methods directly map onto their 32-bit equivalents. 136 #if !PLATFORM(X86_64) 136 // FIXME: should this use a test for 32-bitness instead of this specific exception? 137 #if !CPU(X86_64) 137 138 void addPtr(RegisterID src, RegisterID dest) 138 139 { -
trunk/JavaScriptCore/assembler/MacroAssemblerARM.cpp
r48782 r52729 27 27 #include "config.h" 28 28 29 #if ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)29 #if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL) 30 30 31 31 #include "MacroAssemblerARM.h" … … 63 63 const bool MacroAssemblerARM::s_isVFPPresent = isVFPPresent(); 64 64 65 #if defined(ARM_REQUIRE_NATURAL_ALIGNMENT) && ARM_REQUIRE_NATURAL_ALIGNMENT 65 #if CPU(ARMV5_OR_LOWER) 66 /* On ARMv5 and below, natural alignment is required. */ 66 67 void MacroAssemblerARM::load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest) 67 68 { … … 92 93 } 93 94 94 #endif // ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)95 #endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL) -
trunk/JavaScriptCore/assembler/MacroAssemblerARM.h
r51067 r52729 31 31 #include <wtf/Platform.h> 32 32 33 #if ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)33 #if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL) 34 34 35 35 #include "ARMAssembler.h" … … 225 225 } 226 226 227 #if defined(ARM_REQUIRE_NATURAL_ALIGNMENT) && ARM_REQUIRE_NATURAL_ALIGNMENT227 #if CPU(ARMV5_OR_LOWER) 228 228 void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest); 229 229 #else … … 929 929 } 930 930 931 #endif // ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)931 #endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL) 932 932 933 933 #endif // MacroAssemblerARM_h -
trunk/JavaScriptCore/assembler/MacroAssemblerCodeRef.h
r49509 r52729 38 38 // ASSERT_VALID_CODE_POINTER checks that ptr is a non-null pointer, and that it is a valid 39 39 // instruction address on the platform (for example, check any alignment requirements). 40 #if PLATFORM(ARM_THUMB2)40 #if CPU(ARM_THUMB2) 41 41 // ARM/thumb instructions must be 16-bit aligned, but all code pointers to be loaded 42 42 // into the processor are decorated with the bottom bit set, indicating that this is … … 131 131 132 132 explicit MacroAssemblerCodePtr(void* value) 133 #if PLATFORM(ARM_THUMB2)133 #if CPU(ARM_THUMB2) 134 134 // Decorate the pointer as a thumb code pointer. 135 135 : m_value(reinterpret_cast<char*>(value) + 1) … … 148 148 149 149 void* executableAddress() const { return m_value; } 150 #if PLATFORM(ARM_THUMB2)150 #if CPU(ARM_THUMB2) 151 151 // To use this pointer as a data address remove the decoration. 152 152 void* dataLocation() const { ASSERT_VALID_CODE_POINTER(m_value); return reinterpret_cast<char*>(m_value) - 1; } -
trunk/JavaScriptCore/assembler/MacroAssemblerX86.h
r46598 r52729 29 29 #include <wtf/Platform.h> 30 30 31 #if ENABLE(ASSEMBLER) && PLATFORM(X86)31 #if ENABLE(ASSEMBLER) && CPU(X86) 32 32 33 33 #include "MacroAssemblerX86Common.h" -
trunk/JavaScriptCore/assembler/MacroAssemblerX86Common.h
r50595 r52729 543 543 } 544 544 545 #if PLATFORM(X86_64)545 #if CPU(X86_64) 546 546 void move(RegisterID src, RegisterID dest) 547 547 { … … 945 945 friend class MacroAssemblerX86; 946 946 947 #if PLATFORM(X86)947 #if CPU(X86) 948 948 #if PLATFORM(MAC) 949 949 … … 998 998 999 999 #endif // PLATFORM(MAC) 1000 #elif !defined(NDEBUG) // PLATFORM(X86)1000 #elif !defined(NDEBUG) // CPU(X86) 1001 1001 1002 1002 // On x86-64 we should never be checking for SSE2 in a non-debug build, -
trunk/JavaScriptCore/assembler/MacroAssemblerX86_64.h
r50595 r52729 29 29 #include <wtf/Platform.h> 30 30 31 #if ENABLE(ASSEMBLER) && PLATFORM(X86_64)31 #if ENABLE(ASSEMBLER) && CPU(X86_64) 32 32 33 33 #include "MacroAssemblerX86Common.h" -
trunk/JavaScriptCore/assembler/X86Assembler.h
r47834 r52729 29 29 #include <wtf/Platform.h> 30 30 31 #if ENABLE(ASSEMBLER) && ( PLATFORM(X86) || PLATFORM(X86_64))31 #if ENABLE(ASSEMBLER) && (CPU(X86) || CPU(X86_64)) 32 32 33 33 #include "AssemblerBuffer.h" … … 51 51 edi, 52 52 53 #if PLATFORM(X86_64)53 #if CPU(X86_64) 54 54 r8, 55 55 r9, … … 119 119 OP_CMP_EvGv = 0x39, 120 120 OP_CMP_GvEv = 0x3B, 121 #if PLATFORM(X86_64)121 #if CPU(X86_64) 122 122 PRE_REX = 0x40, 123 123 #endif 124 124 OP_PUSH_EAX = 0x50, 125 125 OP_POP_EAX = 0x58, 126 #if PLATFORM(X86_64)126 #if CPU(X86_64) 127 127 OP_MOVSXD_GvEv = 0x63, 128 128 #endif … … 297 297 // Arithmetic operations: 298 298 299 #if ! PLATFORM(X86_64)299 #if !CPU(X86_64) 300 300 void adcl_im(int imm, void* addr) 301 301 { … … 347 347 } 348 348 349 #if PLATFORM(X86_64)349 #if CPU(X86_64) 350 350 void addq_rr(RegisterID src, RegisterID dst) 351 351 { … … 424 424 } 425 425 426 #if PLATFORM(X86_64)426 #if CPU(X86_64) 427 427 void andq_rr(RegisterID src, RegisterID dst) 428 428 { … … 510 510 } 511 511 512 #if PLATFORM(X86_64)512 #if CPU(X86_64) 513 513 void orq_rr(RegisterID src, RegisterID dst) 514 514 { … … 576 576 } 577 577 578 #if PLATFORM(X86_64)578 #if CPU(X86_64) 579 579 void subq_rr(RegisterID src, RegisterID dst) 580 580 { … … 642 642 } 643 643 644 #if PLATFORM(X86_64)644 #if CPU(X86_64) 645 645 void xorq_rr(RegisterID src, RegisterID dst) 646 646 { … … 690 690 } 691 691 692 #if PLATFORM(X86_64)692 #if CPU(X86_64) 693 693 void sarq_CLr(RegisterID dst) 694 694 { … … 790 790 } 791 791 792 #if PLATFORM(X86_64)792 #if CPU(X86_64) 793 793 void cmpq_rr(RegisterID src, RegisterID dst) 794 794 { … … 898 898 } 899 899 900 #if PLATFORM(X86_64)900 #if CPU(X86_64) 901 901 void testq_rr(RegisterID src, RegisterID dst) 902 902 { … … 972 972 } 973 973 974 #if PLATFORM(X86_64)974 #if CPU(X86_64) 975 975 void xchgq_rr(RegisterID src, RegisterID dst) 976 976 { … … 1002 1002 { 1003 1003 m_formatter.oneByteOp(OP_MOV_EAXOv); 1004 #if PLATFORM(X86_64)1004 #if CPU(X86_64) 1005 1005 m_formatter.immediate64(reinterpret_cast<int64_t>(addr)); 1006 1006 #else … … 1039 1039 { 1040 1040 m_formatter.oneByteOp(OP_MOV_OvEAX); 1041 #if PLATFORM(X86_64)1041 #if CPU(X86_64) 1042 1042 m_formatter.immediate64(reinterpret_cast<int64_t>(addr)); 1043 1043 #else … … 1046 1046 } 1047 1047 1048 #if PLATFORM(X86_64)1048 #if CPU(X86_64) 1049 1049 void movq_rr(RegisterID src, RegisterID dst) 1050 1050 { … … 1158 1158 m_formatter.oneByteOp(OP_LEA, dst, base, offset); 1159 1159 } 1160 #if PLATFORM(X86_64)1160 #if CPU(X86_64) 1161 1161 void leaq_mr(int offset, RegisterID base, RegisterID dst) 1162 1162 { … … 1324 1324 } 1325 1325 1326 #if ! PLATFORM(X86_64)1326 #if !CPU(X86_64) 1327 1327 void cvtsi2sd_mr(void* address, XMMRegisterID dst) 1328 1328 { … … 1344 1344 } 1345 1345 1346 #if PLATFORM(X86_64)1346 #if CPU(X86_64) 1347 1347 void movq_rr(XMMRegisterID src, RegisterID dst) 1348 1348 { … … 1370 1370 } 1371 1371 1372 #if ! PLATFORM(X86_64)1372 #if !CPU(X86_64) 1373 1373 void movsd_mr(void* address, XMMRegisterID dst) 1374 1374 { … … 1536 1536 static void repatchLoadPtrToLEA(void* where) 1537 1537 { 1538 #if PLATFORM(X86_64)1538 #if CPU(X86_64) 1539 1539 // On x86-64 pointer memory accesses require a 64-bit operand, and as such a REX prefix. 1540 1540 // Skip over the prefix byte. … … 1680 1680 } 1681 1681 1682 #if ! PLATFORM(X86_64)1682 #if !CPU(X86_64) 1683 1683 void oneByteOp(OneByteOpcodeID opcode, int reg, void* address) 1684 1684 { … … 1723 1723 } 1724 1724 1725 #if ! PLATFORM(X86_64)1725 #if !CPU(X86_64) 1726 1726 void twoByteOp(TwoByteOpcodeID opcode, int reg, void* address) 1727 1727 { … … 1733 1733 #endif 1734 1734 1735 #if PLATFORM(X86_64)1735 #if CPU(X86_64) 1736 1736 // Quad-word-sized operands: 1737 1737 // … … 1892 1892 static const RegisterID hasSib = X86Registers::esp; 1893 1893 static const RegisterID noIndex = X86Registers::esp; 1894 #if PLATFORM(X86_64)1894 #if CPU(X86_64) 1895 1895 static const RegisterID noBase2 = X86Registers::r13; 1896 1896 static const RegisterID hasSib2 = X86Registers::r12; … … 1968 1968 { 1969 1969 // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there. 1970 #if PLATFORM(X86_64)1970 #if CPU(X86_64) 1971 1971 if ((base == hasSib) || (base == hasSib2)) { 1972 1972 #else … … 1983 1983 } 1984 1984 } else { 1985 #if PLATFORM(X86_64)1985 #if CPU(X86_64) 1986 1986 if (!offset && (base != noBase) && (base != noBase2)) 1987 1987 #else … … 2002 2002 { 2003 2003 // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there. 2004 #if PLATFORM(X86_64)2004 #if CPU(X86_64) 2005 2005 if ((base == hasSib) || (base == hasSib2)) { 2006 2006 #else … … 2019 2019 ASSERT(index != noIndex); 2020 2020 2021 #if PLATFORM(X86_64)2021 #if CPU(X86_64) 2022 2022 if (!offset && (base != noBase) && (base != noBase2)) 2023 2023 #else … … 2034 2034 } 2035 2035 2036 #if ! PLATFORM(X86_64)2036 #if !CPU(X86_64) 2037 2037 void memoryModRM(int reg, void* address) 2038 2038 { … … 2049 2049 } // namespace JSC 2050 2050 2051 #endif // ENABLE(ASSEMBLER) && PLATFORM(X86)2051 #endif // ENABLE(ASSEMBLER) && CPU(X86) 2052 2052 2053 2053 #endif // X86Assembler_h -
trunk/JavaScriptCore/jit/ExecutableAllocator.h
r52538 r52729 181 181 182 182 183 #if PLATFORM(X86) || PLATFORM(X86_64)183 #if CPU(X86) || CPU(X86_64) 184 184 static void cacheFlush(void*, size_t) 185 185 { 186 186 } 187 #elif PLATFORM(ARM_THUMB2) && PLATFORM(IPHONE)187 #elif CPU(ARM_THUMB2) && PLATFORM(IPHONE) 188 188 static void cacheFlush(void* code, size_t size) 189 189 { … … 191 191 sys_icache_invalidate(code, size); 192 192 } 193 #elif PLATFORM(ARM_THUMB2) && PLATFORM(LINUX)193 #elif CPU(ARM_THUMB2) && PLATFORM(LINUX) 194 194 static void cacheFlush(void* code, size_t size) 195 195 { … … 212 212 User::IMB_Range(code, static_cast<char*>(code) + size); 213 213 } 214 #elif PLATFORM(ARM_TRADITIONAL) && PLATFORM(LINUX)214 #elif CPU(ARM_TRADITIONAL) && PLATFORM(LINUX) 215 215 static void cacheFlush(void* code, size_t size) 216 216 { -
trunk/JavaScriptCore/jit/ExecutableAllocatorFixedVMPool.cpp
r44341 r52729 30 30 #include <errno.h> 31 31 32 #if ENABLE(ASSEMBLER) && PLATFORM(MAC) && PLATFORM(X86_64)32 #if ENABLE(ASSEMBLER) && PLATFORM(MAC) && CPU(X86_64) 33 33 34 34 #include "TCSpinLock.h" -
trunk/JavaScriptCore/jit/ExecutableAllocatorPosix.cpp
r52355 r52729 36 36 namespace JSC { 37 37 38 #if !(PLATFORM(MAC) && PLATFORM(X86_64))38 #if !(PLATFORM(MAC) && CPU(X86_64)) 39 39 40 40 void ExecutableAllocator::intializePageSize() … … 58 58 } 59 59 60 #endif // !(PLATFORM(MAC) && PLATFORM(X86_64))60 #endif // !(PLATFORM(MAC) && CPU(X86_64)) 61 61 62 62 #if ENABLE(ASSEMBLER_WX_EXCLUSIVE) -
trunk/JavaScriptCore/jit/ExecutableAllocatorSymbian.cpp
r49679 r52729 35 35 void ExecutableAllocator::intializePageSize() 36 36 { 37 #if PLATFORM_ARM_ARCH(5)37 #if CPU(ARMV5_OR_LOWER) 38 38 // The moving memory model (as used in ARMv5 and earlier platforms) 39 39 // on Symbian OS limits the number of chunks for each process to 16. -
trunk/JavaScriptCore/jit/JIT.cpp
r51735 r52729 28 28 29 29 // This probably does not belong here; adding here for now as a quick Windows build fix. 30 #if ENABLE(ASSEMBLER) && PLATFORM(X86) && !PLATFORM(MAC)30 #if ENABLE(ASSEMBLER) && CPU(X86) && !PLATFORM(MAC) 31 31 #include "MacroAssembler.h" 32 32 JSC::MacroAssemblerX86Common::SSE2CheckState JSC::MacroAssemblerX86Common::s_sse2CheckState = NotCheckedSSE2; -
trunk/JavaScriptCore/jit/JIT.h
r52051 r52729 193 193 // MacroAssembler will need to plant register swaps if it is not - 194 194 // however the code will still function correctly. 195 #if PLATFORM(X86_64)195 #if CPU(X86_64) 196 196 static const RegisterID returnValueRegister = X86Registers::eax; 197 197 static const RegisterID cachedResultRegister = X86Registers::eax; … … 211 211 static const FPRegisterID fpRegT1 = X86Registers::xmm1; 212 212 static const FPRegisterID fpRegT2 = X86Registers::xmm2; 213 #elif PLATFORM(X86)213 #elif CPU(X86) 214 214 static const RegisterID returnValueRegister = X86Registers::eax; 215 215 static const RegisterID cachedResultRegister = X86Registers::eax; … … 229 229 static const FPRegisterID fpRegT1 = X86Registers::xmm1; 230 230 static const FPRegisterID fpRegT2 = X86Registers::xmm2; 231 #elif PLATFORM(ARM_THUMB2)231 #elif CPU(ARM_THUMB2) 232 232 static const RegisterID returnValueRegister = ARMRegisters::r0; 233 233 static const RegisterID cachedResultRegister = ARMRegisters::r0; … … 245 245 static const FPRegisterID fpRegT1 = ARMRegisters::d1; 246 246 static const FPRegisterID fpRegT2 = ARMRegisters::d2; 247 #elif PLATFORM(ARM_TRADITIONAL)247 #elif CPU(ARM_TRADITIONAL) 248 248 static const RegisterID returnValueRegister = ARMRegisters::r0; 249 249 static const RegisterID cachedResultRegister = ARMRegisters::r0; … … 437 437 void emitBinaryDoubleOp(OpcodeID, unsigned dst, unsigned op1, unsigned op2, OperandTypes, JumpList& notInt32Op1, JumpList& notInt32Op2, bool op1IsInRegisters = true, bool op2IsInRegisters = true); 438 438 439 #if PLATFORM(X86)439 #if CPU(X86) 440 440 // These architecture specific value are used to enable patching - see comment on op_put_by_id. 441 441 static const int patchOffsetPutByIdStructure = 7; … … 466 466 static const int patchOffsetMethodCheckProtoStruct = 18; 467 467 static const int patchOffsetMethodCheckPutFunction = 29; 468 #elif PLATFORM(ARM_TRADITIONAL)468 #elif CPU(ARM_TRADITIONAL) 469 469 // These architecture specific value are used to enable patching - see comment on op_put_by_id. 470 470 static const int patchOffsetPutByIdStructure = 4; … … 575 575 void compilePutDirectOffset(RegisterID base, RegisterID value, Structure* structure, size_t cachedOffset); 576 576 577 #if PLATFORM(X86_64)577 #if CPU(X86_64) 578 578 // These architecture specific value are used to enable patching - see comment on op_put_by_id. 579 579 static const int patchOffsetPutByIdStructure = 10; … … 598 598 static const int patchOffsetMethodCheckProtoStruct = 30; 599 599 static const int patchOffsetMethodCheckPutFunction = 50; 600 #elif PLATFORM(X86)600 #elif CPU(X86) 601 601 // These architecture specific value are used to enable patching - see comment on op_put_by_id. 602 602 static const int patchOffsetPutByIdStructure = 7; … … 625 625 static const int patchOffsetMethodCheckProtoStruct = 18; 626 626 static const int patchOffsetMethodCheckPutFunction = 29; 627 #elif PLATFORM(ARM_THUMB2)627 #elif CPU(ARM_THUMB2) 628 628 // These architecture specific value are used to enable patching - see comment on op_put_by_id. 629 629 static const int patchOffsetPutByIdStructure = 10; … … 648 648 static const int patchOffsetMethodCheckProtoStruct = 34; 649 649 static const int patchOffsetMethodCheckPutFunction = 58; 650 #elif PLATFORM(ARM_TRADITIONAL)650 #elif CPU(ARM_TRADITIONAL) 651 651 // These architecture specific value are used to enable patching - see comment on op_put_by_id. 652 652 static const int patchOffsetPutByIdStructure = 4; -
trunk/JavaScriptCore/jit/JITArithmetic.cpp
r51939 r52729 1117 1117 /* ------------------------------ BEGIN: OP_MOD ------------------------------ */ 1118 1118 1119 #if PLATFORM(X86) || PLATFORM(X86_64)1119 #if CPU(X86) || CPU(X86_64) 1120 1120 1121 1121 void JIT::emit_op_mod(Instruction* currentInstruction) … … 1179 1179 } 1180 1180 1181 #else // PLATFORM(X86) || PLATFORM(X86_64)1181 #else // CPU(X86) || CPU(X86_64) 1182 1182 1183 1183 void JIT::emit_op_mod(Instruction* currentInstruction) … … 1197 1197 } 1198 1198 1199 #endif // PLATFORM(X86) || PLATFORM(X86_64)1199 #endif // CPU(X86) || CPU(X86_64) 1200 1200 1201 1201 /* ------------------------------ END: OP_MOD ------------------------------ */ … … 2082 2082 /* ------------------------------ BEGIN: OP_MOD ------------------------------ */ 2083 2083 2084 #if PLATFORM(X86) || PLATFORM(X86_64)2084 #if CPU(X86) || CPU(X86_64) 2085 2085 2086 2086 void JIT::emit_op_mod(Instruction* currentInstruction) … … 2131 2131 } 2132 2132 2133 #else // PLATFORM(X86) || PLATFORM(X86_64)2133 #else // CPU(X86) || CPU(X86_64) 2134 2134 2135 2135 void JIT::emit_op_mod(Instruction* currentInstruction) … … 2150 2150 } 2151 2151 2152 #endif // PLATFORM(X86) || PLATFORM(X86_64)2152 #endif // CPU(X86) || CPU(X86_64) 2153 2153 2154 2154 /* ------------------------------ END: OP_MOD ------------------------------ */ -
trunk/JavaScriptCore/jit/JITInlineMethods.h
r50599 r52729 116 116 ALWAYS_INLINE void JIT::beginUninterruptedSequence(int insnSpace, int constSpace) 117 117 { 118 #if PLATFORM(ARM_TRADITIONAL)118 #if CPU(ARM_TRADITIONAL) 119 119 #ifndef NDEBUG 120 120 // Ensure the label after the sequence can also fit … … 145 145 #endif 146 146 147 #if PLATFORM(ARM)147 #if CPU(ARM) 148 148 149 149 ALWAYS_INLINE void JIT::preserveReturnAddressAfterCall(RegisterID reg) … … 162 162 } 163 163 164 #else // PLATFORM(X86) || PLATFORM(X86_64)164 #else // CPU(X86) || CPU(X86_64) 165 165 166 166 ALWAYS_INLINE void JIT::preserveReturnAddressAfterCall(RegisterID reg) … … 195 195 ALWAYS_INLINE void JIT::restoreArgumentReferenceForTrampoline() 196 196 { 197 #if PLATFORM(X86)197 #if CPU(X86) 198 198 // Within a trampoline the return address will be on the stack at this point. 199 199 addPtr(Imm32(sizeof(void*)), stackPointerRegister, firstArgumentRegister); 200 #elif PLATFORM(ARM)200 #elif CPU(ARM) 201 201 move(stackPointerRegister, firstArgumentRegister); 202 202 #endif … … 266 266 ALWAYS_INLINE void JIT::emitCount(AbstractSamplingCounter& counter, uint32_t count) 267 267 { 268 #if PLATFORM(X86_64) // Or any other 64-bit plattform.268 #if CPU(X86_64) // Or any other 64-bit plattform. 269 269 addPtr(Imm32(count), AbsoluteAddress(&counter.m_counter)); 270 #elif PLATFORM(X86) // Or any other little-endian 32-bit plattform.270 #elif CPU(X86) // Or any other little-endian 32-bit plattform. 271 271 intptr_t hiWord = reinterpret_cast<intptr_t>(&counter.m_counter) + sizeof(int32_t); 272 272 add32(Imm32(count), AbsoluteAddress(&counter.m_counter)); … … 279 279 280 280 #if ENABLE(OPCODE_SAMPLING) 281 #if PLATFORM(X86_64)281 #if CPU(X86_64) 282 282 ALWAYS_INLINE void JIT::sampleInstruction(Instruction* instruction, bool inHostFunction) 283 283 { … … 294 294 295 295 #if ENABLE(CODEBLOCK_SAMPLING) 296 #if PLATFORM(X86_64)296 #if CPU(X86_64) 297 297 ALWAYS_INLINE void JIT::sampleCodeBlock(CodeBlock* codeBlock) 298 298 { -
trunk/JavaScriptCore/jit/JITOpcodes.cpp
r52051 r52729 138 138 jump(regT0); 139 139 140 #if PLATFORM(X86) || PLATFORM(ARM_TRADITIONAL)140 #if CPU(X86) || CPU(ARM_TRADITIONAL) 141 141 Label nativeCallThunk = align(); 142 142 preserveReturnAddressAfterCall(regT0); … … 149 149 emitPutToCallFrameHeader(regT1, RegisterFile::ScopeChain); 150 150 151 #if PLATFORM(X86)151 #if CPU(X86) 152 152 emitGetFromCallFrameHeader32(RegisterFile::ArgumentCount, regT0); 153 153 … … 249 249 addPtr(Imm32(NativeCallFrameSize - sizeof(NativeFunctionCalleeSignature)), stackPointerRegister); 250 250 251 #elif PLATFORM(ARM_TRADITIONAL)251 #elif CPU(ARM_TRADITIONAL) 252 252 emitGetFromCallFrameHeader32(RegisterFile::ArgumentCount, regT0); 253 253 … … 1602 1602 1603 1603 1604 #if PLATFORM(X86_64)1604 #if CPU(X86_64) 1605 1605 emitGetFromCallFrameHeader32(RegisterFile::ArgumentCount, X86Registers::ecx); 1606 1606 … … 1638 1638 1639 1639 addPtr(Imm32(sizeof(ArgList)), stackPointerRegister); 1640 #elif PLATFORM(X86)1640 #elif CPU(X86) 1641 1641 emitGetFromCallFrameHeader32(RegisterFile::ArgumentCount, regT0); 1642 1642 … … 1730 1730 addPtr(Imm32(NativeCallFrameSize - sizeof(NativeFunctionCalleeSignature)), stackPointerRegister); 1731 1731 1732 #elif PLATFORM(ARM)1732 #elif CPU(ARM) 1733 1733 emitGetFromCallFrameHeader32(RegisterFile::ArgumentCount, regT0); 1734 1734 -
trunk/JavaScriptCore/jit/JITPropertyAccess.cpp
r50982 r52729 731 731 // Check the prototype object's Structure had not changed. 732 732 Structure** prototypeStructureAddress = &(protoObject->m_structure); 733 #if PLATFORM(X86_64)733 #if CPU(X86_64) 734 734 move(ImmPtr(prototypeStructure), regT3); 735 735 Jump failureCases2 = branchPtr(NotEqual, AbsoluteAddress(prototypeStructureAddress), regT3); … … 811 811 // Check the prototype object's Structure had not changed. 812 812 Structure** prototypeStructureAddress = &(protoObject->m_structure); 813 #if PLATFORM(X86_64)813 #if CPU(X86_64) 814 814 move(ImmPtr(prototypeStructure), regT3); 815 815 Jump failureCases2 = branchPtr(NotEqual, AbsoluteAddress(prototypeStructureAddress), regT3); … … 864 864 // Check the prototype object's Structure had not changed. 865 865 Structure** prototypeStructureAddress = &(protoObject->m_structure); 866 #if PLATFORM(X86_64)866 #if CPU(X86_64) 867 867 move(ImmPtr(currStructure), regT3); 868 868 bucketsOfFail.append(branchPtr(NotEqual, AbsoluteAddress(prototypeStructureAddress), regT3)); … … 919 919 // Check the prototype object's Structure had not changed. 920 920 Structure** prototypeStructureAddress = &(protoObject->m_structure); 921 #if PLATFORM(X86_64)921 #if CPU(X86_64) 922 922 move(ImmPtr(currStructure), regT3); 923 923 bucketsOfFail.append(branchPtr(NotEqual, AbsoluteAddress(prototypeStructureAddress), regT3)); … … 1677 1677 // Check the prototype object's Structure had not changed. 1678 1678 Structure** prototypeStructureAddress = &(protoObject->m_structure); 1679 #if PLATFORM(X86_64)1679 #if CPU(X86_64) 1680 1680 move(ImmPtr(prototypeStructure), regT3); 1681 1681 Jump failureCases2 = branchPtr(NotEqual, AbsoluteAddress(prototypeStructureAddress), regT3); … … 1752 1752 // Check the prototype object's Structure had not changed. 1753 1753 Structure** prototypeStructureAddress = &(protoObject->m_structure); 1754 #if PLATFORM(X86_64)1754 #if CPU(X86_64) 1755 1755 move(ImmPtr(prototypeStructure), regT3); 1756 1756 Jump failureCases2 = branchPtr(NotEqual, AbsoluteAddress(prototypeStructureAddress), regT3); … … 1805 1805 // Check the prototype object's Structure had not changed. 1806 1806 Structure** prototypeStructureAddress = &(protoObject->m_structure); 1807 #if PLATFORM(X86_64)1807 #if CPU(X86_64) 1808 1808 move(ImmPtr(currStructure), regT3); 1809 1809 bucketsOfFail.append(branchPtr(NotEqual, AbsoluteAddress(prototypeStructureAddress), regT3)); … … 1858 1858 // Check the prototype object's Structure had not changed. 1859 1859 Structure** prototypeStructureAddress = &(protoObject->m_structure); 1860 #if PLATFORM(X86_64)1860 #if CPU(X86_64) 1861 1861 move(ImmPtr(currStructure), regT3); 1862 1862 bucketsOfFail.append(branchPtr(NotEqual, AbsoluteAddress(prototypeStructureAddress), regT3)); -
trunk/JavaScriptCore/jit/JITStubs.cpp
r52026 r52729 77 77 #endif 78 78 79 #if PLATFORM(LINUX) && PLATFORM(X86_64)79 #if PLATFORM(LINUX) && CPU(X86_64) 80 80 #define SYMBOL_STRING_RELOCATION(name) #name "@plt" 81 81 #else … … 89 89 // IBM's own file format 90 90 #define HIDE_SYMBOL(name) ".lglobl " #name 91 #elif PLATFORM(LINUX) || PLATFORM(FREEBSD) || PLATFORM(OPENBSD) || PLATFORM(SOLARIS) || (PLATFORM(HPUX) && PLATFORM(IA64)) || PLATFORM(SYMBIAN) || PLATFORM(NETBSD)91 #elif PLATFORM(LINUX) || PLATFORM(FREEBSD) || PLATFORM(OPENBSD) || PLATFORM(SOLARIS) || (PLATFORM(HPUX) && CPU(IA64)) || PLATFORM(SYMBIAN) || PLATFORM(NETBSD) 92 92 // ELF platform 93 93 #define HIDE_SYMBOL(name) ".hidden " #name … … 98 98 #if USE(JSVALUE32_64) 99 99 100 #if COMPILER(GCC) && PLATFORM(X86)100 #if COMPILER(GCC) && CPU(X86) 101 101 102 102 // These ASSERTs remind you that, if you change the layout of JITStackFrame, you … … 157 157 ); 158 158 159 #elif COMPILER(GCC) && PLATFORM(X86_64)159 #elif COMPILER(GCC) && CPU(X86_64) 160 160 161 161 #if USE(JIT_STUB_ARGUMENT_VA_LIST) … … 227 227 ); 228 228 229 #elif COMPILER(GCC) && PLATFORM(ARM_THUMB2)229 #elif COMPILER(GCC) && CPU(ARM_THUMB2) 230 230 231 231 #if USE(JIT_STUB_ARGUMENT_VA_LIST) … … 293 293 ); 294 294 295 #elif COMPILER(GCC) && PLATFORM(ARM_TRADITIONAL)295 #elif COMPILER(GCC) && CPU(ARM_TRADITIONAL) 296 296 297 297 asm volatile ( … … 391 391 } 392 392 393 #endif // COMPILER(GCC) && PLATFORM(X86)393 #endif // COMPILER(GCC) && CPU(X86) 394 394 395 395 #else // USE(JSVALUE32_64) 396 396 397 #if COMPILER(GCC) && PLATFORM(X86)397 #if COMPILER(GCC) && CPU(X86) 398 398 399 399 // These ASSERTs remind you that, if you change the layout of JITStackFrame, you … … 453 453 ); 454 454 455 #elif COMPILER(GCC) && PLATFORM(X86_64)455 #elif COMPILER(GCC) && CPU(X86_64) 456 456 457 457 #if USE(JIT_STUB_ARGUMENT_VA_LIST) … … 530 530 ); 531 531 532 #elif COMPILER(GCC) && PLATFORM(ARM_THUMB2)532 #elif COMPILER(GCC) && CPU(ARM_THUMB2) 533 533 534 534 #if USE(JIT_STUB_ARGUMENT_VA_LIST) … … 597 597 ); 598 598 599 #elif COMPILER(GCC) && PLATFORM(ARM_TRADITIONAL)599 #elif COMPILER(GCC) && CPU(ARM_TRADITIONAL) 600 600 601 601 asm volatile ( … … 697 697 } 698 698 699 #endif // COMPILER(GCC) && PLATFORM(X86)699 #endif // COMPILER(GCC) && CPU(X86) 700 700 701 701 #endif // USE(JSVALUE32_64) … … 711 711 JIT::compileCTIMachineTrampolines(globalData, &m_executablePool, &m_ctiStringLengthTrampoline, &m_ctiVirtualCallLink, &m_ctiVirtualCall, &m_ctiNativeCallThunk); 712 712 713 #if PLATFORM(ARM_THUMB2)713 #if CPU(ARM_THUMB2) 714 714 // Unfortunate the arm compiler does not like the use of offsetof on JITStackFrame (since it contains non POD types), 715 715 // and the OBJECT_OFFSETOF macro does not appear constantish enough for it to be happy with its use in COMPILE_ASSERT … … 958 958 } while (0) 959 959 960 #if PLATFORM(ARM_THUMB2)960 #if CPU(ARM_THUMB2) 961 961 962 962 #define DEFINE_STUB_FUNCTION(rtype, op) \ … … 979 979 rtype JITStubThunked_##op(STUB_ARGS_DECLARATION) \ 980 980 981 #elif PLATFORM(ARM_TRADITIONAL) && COMPILER(GCC)981 #elif CPU(ARM_TRADITIONAL) && COMPILER(GCC) 982 982 983 983 #if USE(JSVALUE32_64) -
trunk/JavaScriptCore/jit/JITStubs.h
r51735 r52729 76 76 }; 77 77 78 #if PLATFORM(X86_64)78 #if CPU(X86_64) 79 79 struct JITStackFrame { 80 80 void* reserved; // Unused … … 100 100 ReturnAddressPtr* returnAddressSlot() { return reinterpret_cast<ReturnAddressPtr*>(this) - 1; } 101 101 }; 102 #elif PLATFORM(X86)102 #elif CPU(X86) 103 103 #if COMPILER(MSVC) 104 104 #pragma pack(push) … … 131 131 #pragma pack(pop) 132 132 #endif // COMPILER(MSVC) 133 #elif PLATFORM(ARM_THUMB2)133 #elif CPU(ARM_THUMB2) 134 134 struct JITStackFrame { 135 135 void* reserved; // Unused … … 159 159 ReturnAddressPtr* returnAddressSlot() { return &thunkReturnAddress; } 160 160 }; 161 #elif PLATFORM(ARM_TRADITIONAL)161 #elif CPU(ARM_TRADITIONAL) 162 162 struct JITStackFrame { 163 163 JITStubArg padding; // Unused … … 203 203 #define STUB_ARGS (args) 204 204 205 #if PLATFORM(X86) && COMPILER(MSVC)205 #if CPU(X86) && COMPILER(MSVC) 206 206 #define JIT_STUB __fastcall 207 #elif PLATFORM(X86) && COMPILER(GCC)207 #elif CPU(X86) && COMPILER(GCC) 208 208 #define JIT_STUB __attribute__ ((fastcall)) 209 209 #else … … 212 212 #endif 213 213 214 #if PLATFORM(X86_64)214 #if CPU(X86_64) 215 215 struct VoidPtrPair { 216 216 void* first; -
trunk/JavaScriptCore/runtime/Collector.cpp
r52176 r52729 540 540 pthread_t thread = pthread_self(); 541 541 return pthread_get_stackaddr_np(thread); 542 #elif PLATFORM(WIN_OS) && PLATFORM(X86) && COMPILER(MSVC)542 #elif PLATFORM(WIN_OS) && CPU(X86) && COMPILER(MSVC) 543 543 // offset 0x18 from the FS segment register gives a pointer to 544 544 // the thread information block for the current thread … … 549 549 } 550 550 return static_cast<void*>(pTib->StackBase); 551 #elif PLATFORM(WIN_OS) && PLATFORM(X86_64) && COMPILER(MSVC)551 #elif PLATFORM(WIN_OS) && CPU(X86_64) && COMPILER(MSVC) 552 552 PNT_TIB64 pTib = reinterpret_cast<PNT_TIB64>(NtCurrentTeb()); 553 553 return reinterpret_cast<void*>(pTib->StackBase); 554 #elif PLATFORM(WIN_OS) && PLATFORM(X86) && COMPILER(GCC)554 #elif PLATFORM(WIN_OS) && CPU(X86) && COMPILER(GCC) 555 555 // offset 0x18 from the FS segment register gives a pointer to 556 556 // the thread information block for the current thread … … 824 824 #if PLATFORM(DARWIN) 825 825 826 #if PLATFORM(X86)826 #if CPU(X86) 827 827 typedef i386_thread_state_t PlatformThreadRegisters; 828 #elif PLATFORM(X86_64)828 #elif CPU(X86_64) 829 829 typedef x86_thread_state64_t PlatformThreadRegisters; 830 #elif PLATFORM(PPC)830 #elif CPU(PPC) 831 831 typedef ppc_thread_state_t PlatformThreadRegisters; 832 #elif PLATFORM(PPC64)832 #elif CPU(PPC64) 833 833 typedef ppc_thread_state64_t PlatformThreadRegisters; 834 #elif PLATFORM(ARM)834 #elif CPU(ARM) 835 835 typedef arm_thread_state_t PlatformThreadRegisters; 836 836 #else … … 838 838 #endif 839 839 840 #elif PLATFORM(WIN_OS)&& PLATFORM(X86)840 #elif PLATFORM(WIN_OS)&& CPU(X86) 841 841 typedef CONTEXT PlatformThreadRegisters; 842 842 #else … … 848 848 #if PLATFORM(DARWIN) 849 849 850 #if PLATFORM(X86)850 #if CPU(X86) 851 851 unsigned user_count = sizeof(regs)/sizeof(int); 852 852 thread_state_flavor_t flavor = i386_THREAD_STATE; 853 #elif PLATFORM(X86_64)853 #elif CPU(X86_64) 854 854 unsigned user_count = x86_THREAD_STATE64_COUNT; 855 855 thread_state_flavor_t flavor = x86_THREAD_STATE64; 856 #elif PLATFORM(PPC)856 #elif CPU(PPC) 857 857 unsigned user_count = PPC_THREAD_STATE_COUNT; 858 858 thread_state_flavor_t flavor = PPC_THREAD_STATE; 859 #elif PLATFORM(PPC64)859 #elif CPU(PPC64) 860 860 unsigned user_count = PPC_THREAD_STATE64_COUNT; 861 861 thread_state_flavor_t flavor = PPC_THREAD_STATE64; 862 #elif PLATFORM(ARM)862 #elif CPU(ARM) 863 863 unsigned user_count = ARM_THREAD_STATE_COUNT; 864 864 thread_state_flavor_t flavor = ARM_THREAD_STATE; … … 876 876 // end PLATFORM(DARWIN) 877 877 878 #elif PLATFORM(WIN_OS) && PLATFORM(X86)878 #elif PLATFORM(WIN_OS) && CPU(X86) 879 879 regs.ContextFlags = CONTEXT_INTEGER | CONTEXT_CONTROL | CONTEXT_SEGMENTS; 880 880 GetThreadContext(platformThread, ®s); … … 891 891 #if __DARWIN_UNIX03 892 892 893 #if PLATFORM(X86)893 #if CPU(X86) 894 894 return reinterpret_cast<void*>(regs.__esp); 895 #elif PLATFORM(X86_64)895 #elif CPU(X86_64) 896 896 return reinterpret_cast<void*>(regs.__rsp); 897 #elif PLATFORM(PPC) || PLATFORM(PPC64)897 #elif CPU(PPC) || CPU(PPC64) 898 898 return reinterpret_cast<void*>(regs.__r1); 899 #elif PLATFORM(ARM)899 #elif CPU(ARM) 900 900 return reinterpret_cast<void*>(regs.__sp); 901 901 #else … … 905 905 #else // !__DARWIN_UNIX03 906 906 907 #if PLATFORM(X86)907 #if CPU(X86) 908 908 return reinterpret_cast<void*>(regs.esp); 909 #elif PLATFORM(X86_64)909 #elif CPU(X86_64) 910 910 return reinterpret_cast<void*>(regs.rsp); 911 #elif (PLATFORM(PPC) || PLATFORM(PPC64))911 #elif CPU(PPC) || CPU(PPC64) 912 912 return reinterpret_cast<void*>(regs.r1); 913 913 #else … … 918 918 919 919 // end PLATFORM(DARWIN) 920 #elif PLATFORM(X86) && PLATFORM(WIN_OS)920 #elif CPU(X86) && PLATFORM(WIN_OS) 921 921 return reinterpret_cast<void*>((uintptr_t) regs.Esp); 922 922 #else -
trunk/JavaScriptCore/wrec/WREC.h
r38857 r52729 33 33 #include <wtf/unicode/Unicode.h> 34 34 35 #if COMPILER(GCC) && PLATFORM(X86)35 #if COMPILER(GCC) && CPU(X86) 36 36 #define WREC_CALL __attribute__ ((regparm (3))) 37 37 #else -
trunk/JavaScriptCore/wrec/WRECGenerator.cpp
r47530 r52729 41 41 void Generator::generateEnter() 42 42 { 43 #if PLATFORM(X86)43 #if CPU(X86) 44 44 // On x86 edi & esi are callee preserved registers. 45 45 push(X86Registers::edi); … … 72 72 73 73 // Restore callee save registers. 74 #if PLATFORM(X86)74 #if CPU(X86) 75 75 pop(X86Registers::esi); 76 76 pop(X86Registers::edi); … … 111 111 move(Imm32(-1), returnRegister); 112 112 113 #if PLATFORM(X86)113 #if CPU(X86) 114 114 pop(X86Registers::esi); 115 115 pop(X86Registers::edi); -
trunk/JavaScriptCore/wrec/WRECGenerator.h
r47530 r52729 63 63 } 64 64 65 #if PLATFORM(X86)65 #if CPU(X86) 66 66 static const RegisterID input = X86Registers::eax; 67 67 static const RegisterID index = X86Registers::edx; … … 74 74 static const RegisterID returnRegister = X86Registers::eax; 75 75 #endif 76 #if PLATFORM(X86_64)76 #if CPU(X86_64) 77 77 static const RegisterID input = X86Registers::edi; 78 78 static const RegisterID index = X86Registers::esi; -
trunk/JavaScriptCore/wtf/FastMalloc.cpp
r49022 r52729 1173 1173 1174 1174 #if defined(WTF_CHANGES) 1175 #if PLATFORM(X86_64)1175 #if CPU(X86_64) 1176 1176 // On all known X86-64 platforms, the upper 16 bits are always unused and therefore 1177 1177 // can be excluded from the PageMap key. -
trunk/JavaScriptCore/wtf/Platform.h
r52711 r52729 90 90 91 91 92 93 /* ==== CPU() - the target CPU architecture ==== */ 94 95 /* This also defines CPU(BIG_ENDIAN) or CPU(MIDDLE_ENDIAN) or neither, as appropriate. */ 96 97 98 /* CPU(ALPHA) - DEC Alpha */ 99 #if defined(__alpha__) 100 #define WTF_CPU_ALPHA 1 101 #endif 102 103 /* CPU(IA64) - Itanium / IA-64 */ 104 #if defined(__ia64__) 105 #define WTF_CPU_IA64 1 106 #endif 107 108 /* CPU(PPC) - PowerPC 32-bit */ 109 #if defined(__ppc__) \ 110 || defined(__PPC__) \ 111 || defined(__powerpc__) \ 112 || defined(__powerpc) \ 113 || defined(__POWERPC__) \ 114 || defined(_M_PPC) \ 115 || defined(__PPC) 116 #define WTF_CPU_PPC 1 117 #define WTF_CPU_BIG_ENDIAN 1 118 #endif 119 120 /* CPU(PPC64) - PowerPC 64-bit */ 121 #if defined(__ppc64__) \ 122 || defined(__PPC64__) 123 #define WTF_CPU_PPC64 1 124 #define WTF_CPU_BIG_ENDIAN 1 125 #endif 126 127 /* CPU(SH4) - SuperH SH-4 */ 128 #if defined(__SH4__) 129 #define WTF_CPU_SH4 1 130 #endif 131 132 /* CPU(SPARC32) - SPARC 32-bit */ 133 #if defined(__sparc) && !defined(__arch64__) || defined(__sparcv8) 134 #define WTF_CPU_SPARC32 1 135 #define WTF_CPU_BIG_ENDIAN 1 136 #endif 137 138 /* CPU(SPARC64) - SPARC 64-bit */ 139 #if defined(__sparc__) && defined(__arch64__) || defined (__sparcv9) 140 #define WTF_CPU_SPARC64 1 141 #define WTF_CPU_BIG_ENDIAN 1 142 #endif 143 144 /* CPU(SPARC) - any SPARC, true for CPU(SPARC32) and CPU(SPARC64) */ 145 #if CPU(SPARC32) || CPU(SPARC64) 146 #define WTF_CPU_SPARC 147 #endif 148 149 /* CPU(X86) - i386 / x86 32-bit */ 150 #if defined(__i386__) \ 151 || defined(i386) \ 152 || defined(_M_IX86) \ 153 || defined(_X86_) \ 154 || defined(__THW_INTEL) 155 #define WTF_CPU_X86 1 156 #endif 157 158 /* CPU(X86_64) - AMD64 / Intel64 / x86_64 64-bit */ 159 #if defined(__x86_64__) \ 160 || defined(_M_X64) 161 #define WTF_CPU_X86_64 1 162 #endif 163 164 /* CPU(ARM) - ARM, any version*/ 165 #if defined(arm) \ 166 || defined(__arm__) 167 #define WTF_CPU_ARM 1 168 169 #if defined(__ARMEB__) 170 #define WTF_CPU_BIG_ENDIAN 1 171 172 #elif !defined(__ARM_EABI__) \ 173 && !defined(__EABI__) \ 174 && !defined(__VFP_FP__) \ 175 && !defined(ANDROID) 176 #define WTF_CPU_MIDDLE_ENDIAN 1 177 178 #endif 179 180 #define WTF_ARM_ARCH_AT_LEAST(N) (CPU(ARM) && WTF_ARM_ARCH_VERSION >= N) 181 182 /* Set WTF_ARM_ARCH_VERSION */ 183 #if defined(__ARM_ARCH_4__) \ 184 || defined(__ARM_ARCH_4T__) \ 185 || defined(__MARM_ARMV4__) \ 186 || defined(_ARMV4I_) 187 #define WTF_ARM_ARCH_VERSION 4 188 189 #elif defined(__ARM_ARCH_5__) \ 190 || defined(__ARM_ARCH_5T__) \ 191 || defined(__ARM_ARCH_5E__) \ 192 || defined(__ARM_ARCH_5TE__) \ 193 || defined(__ARM_ARCH_5TEJ__) \ 194 || defined(__MARM_ARMV5__) 195 #define WTF_ARM_ARCH_VERSION 5 196 197 #elif defined(__ARM_ARCH_6__) \ 198 || defined(__ARM_ARCH_6J__) \ 199 || defined(__ARM_ARCH_6K__) \ 200 || defined(__ARM_ARCH_6Z__) \ 201 || defined(__ARM_ARCH_6ZK__) \ 202 || defined(__ARM_ARCH_6T2__) \ 203 || defined(__ARMV6__) 204 #define WTF_ARM_ARCH_VERSION 6 205 206 #elif defined(__ARM_ARCH_7A__) \ 207 || defined(__ARM_ARCH_7R__) 208 #define WTF_ARM_ARCH_VERSION 7 209 210 /* RVCT sets _TARGET_ARCH_ARM */ 211 #elif defined(__TARGET_ARCH_ARM) 212 #define WTF_ARM_ARCH_VERSION __TARGET_ARCH_ARM 213 214 #else 215 #define WTF_ARM_ARCH_VERSION 0 216 217 #endif 218 219 /* Set WTF_THUMB_ARCH_VERSION */ 220 #if defined(__ARM_ARCH_4T__) 221 #define WTF_THUMB_ARCH_VERSION 1 222 223 #elif defined(__ARM_ARCH_5T__) \ 224 || defined(__ARM_ARCH_5TE__) \ 225 || defined(__ARM_ARCH_5TEJ__) 226 #define WTF_THUMB_ARCH_VERSION 2 227 228 #elif defined(__ARM_ARCH_6J__) \ 229 || defined(__ARM_ARCH_6K__) \ 230 || defined(__ARM_ARCH_6Z__) \ 231 || defined(__ARM_ARCH_6ZK__) \ 232 || defined(__ARM_ARCH_6M__) 233 #define WTF_THUMB_ARCH_VERSION 3 234 235 #elif defined(__ARM_ARCH_6T2__) \ 236 || defined(__ARM_ARCH_7__) \ 237 || defined(__ARM_ARCH_7A__) \ 238 || defined(__ARM_ARCH_7R__) \ 239 || defined(__ARM_ARCH_7M__) 240 #define WTF_THUMB_ARCH_VERSION 4 241 242 /* RVCT sets __TARGET_ARCH_THUMB */ 243 #elif defined(__TARGET_ARCH_THUMB) 244 #define WTF_THUMB_ARCH_VERSION __TARGET_ARCH_THUMB 245 246 #else 247 #define WTF_THUMB_ARCH_VERSION 0 248 #endif 249 250 251 /* CPU(ARMV5_OR_LOWER) - ARM instruction set v5 or earlier */ 252 /* On ARMv5 and below the natural alignment is required. 253 And there are some other differences for v5 or earlier. */ 254 #if !defined(ARMV5_OR_LOWER) && !CPU_ARM_ARCH_AT_LEAST(6) 255 #define WTF_CPU_ARMV5_OR_LOWER 1 256 #endif 257 258 259 /* CPU(ARM_TRADITIONAL) - Thumb2 is not available, only traditional ARM (v4 or greater) */ 260 /* CPU(ARM_THUMB2) - Thumb2 instruction set is available */ 261 /* Only one of these will be defined. */ 262 #if !defined(WTF_CPU_ARM_TRADITIONAL) && !defined(WTF_CPU_ARM_THUMB2) 263 # if defined(thumb2) || defined(__thumb2__) \ 264 || ((defined(__thumb) || defined(__thumb__)) && WTF_THUMB_ARCH_VERSION == 4) 265 # define WTF_CPU_ARM_TRADITIONAL 0 266 # define WTF_CPU_ARM_THUMB2 1 267 # elif WTF_ARM_ARCH_AT_LEAST(4) 268 # define WTF_CPU_ARM_TRADITIONAL 1 269 # define WTF_CPU_ARM_THUMB2 0 270 # else 271 # error "Not supported ARM architecture" 272 # endif 273 #elif CPU(ARM_TRADITIONAL) && CPU(ARM_THUMB2) /* Sanity Check */ 274 # error "Cannot use both of WTF_CPU_ARM_TRADITIONAL and WTF_CPU_ARM_THUMB2 platforms" 275 #endif // !defined(WTF_CPU_ARM_TRADITIONAL) && !defined(WTF_CPU_ARM_THUMB2) 276 277 #endif /* ARM */ 278 279 280 92 281 /* Operating systems - low-level dependencies */ 93 282 … … 270 459 #endif 271 460 272 /* CPU */273 274 /* PLATFORM(PPC) */275 #if defined(__ppc__) \276 || defined(__PPC__) \277 || defined(__powerpc__) \278 || defined(__powerpc) \279 || defined(__POWERPC__) \280 || defined(_M_PPC) \281 || defined(__PPC)282 #define WTF_PLATFORM_PPC 1283 #define WTF_PLATFORM_BIG_ENDIAN 1284 #endif285 286 /* PLATFORM(SPARC32) */287 #if defined(__sparc) && !defined(__arch64__) || defined(__sparcv8)288 #define WTF_PLATFORM_SPARC32 1289 #define WTF_PLATFORM_BIG_ENDIAN 1290 #endif291 292 #if PLATFORM(SPARC32) || PLATFORM(SPARC64)293 #define WTF_PLATFORM_SPARC294 #endif295 296 /* PLATFORM(PPC64) */297 #if defined(__ppc64__) \298 || defined(__PPC64__)299 #define WTF_PLATFORM_PPC64 1300 #define WTF_PLATFORM_BIG_ENDIAN 1301 #endif302 303 /* PLATFORM(ARM) */304 #define PLATFORM_ARM_ARCH(N) (PLATFORM(ARM) && ARM_ARCH_VERSION >= N)305 306 #if defined(arm) \307 || defined(__arm__)308 #define WTF_PLATFORM_ARM 1309 310 #if defined(__ARMEB__)311 #define WTF_PLATFORM_BIG_ENDIAN 1312 313 #elif !defined(__ARM_EABI__) \314 && !defined(__EABI__) \315 && !defined(__VFP_FP__) \316 && !defined(ANDROID)317 #define WTF_PLATFORM_MIDDLE_ENDIAN 1318 319 #endif320 321 /* Set ARM_ARCH_VERSION */322 #if defined(__ARM_ARCH_4__) \323 || defined(__ARM_ARCH_4T__) \324 || defined(__MARM_ARMV4__) \325 || defined(_ARMV4I_)326 #define ARM_ARCH_VERSION 4327 328 #elif defined(__ARM_ARCH_5__) \329 || defined(__ARM_ARCH_5T__) \330 || defined(__ARM_ARCH_5E__) \331 || defined(__ARM_ARCH_5TE__) \332 || defined(__ARM_ARCH_5TEJ__) \333 || defined(__MARM_ARMV5__)334 #define ARM_ARCH_VERSION 5335 336 #elif defined(__ARM_ARCH_6__) \337 || defined(__ARM_ARCH_6J__) \338 || defined(__ARM_ARCH_6K__) \339 || defined(__ARM_ARCH_6Z__) \340 || defined(__ARM_ARCH_6ZK__) \341 || defined(__ARM_ARCH_6T2__) \342 || defined(__ARMV6__)343 #define ARM_ARCH_VERSION 6344 345 #elif defined(__ARM_ARCH_7A__) \346 || defined(__ARM_ARCH_7R__)347 #define ARM_ARCH_VERSION 7348 349 /* RVCT sets _TARGET_ARCH_ARM */350 #elif defined(__TARGET_ARCH_ARM)351 #define ARM_ARCH_VERSION __TARGET_ARCH_ARM352 353 #else354 #define ARM_ARCH_VERSION 0355 356 #endif357 358 /* Set THUMB_ARM_VERSION */359 #if defined(__ARM_ARCH_4T__)360 #define THUMB_ARCH_VERSION 1361 362 #elif defined(__ARM_ARCH_5T__) \363 || defined(__ARM_ARCH_5TE__) \364 || defined(__ARM_ARCH_5TEJ__)365 #define THUMB_ARCH_VERSION 2366 367 #elif defined(__ARM_ARCH_6J__) \368 || defined(__ARM_ARCH_6K__) \369 || defined(__ARM_ARCH_6Z__) \370 || defined(__ARM_ARCH_6ZK__) \371 || defined(__ARM_ARCH_6M__)372 #define THUMB_ARCH_VERSION 3373 374 #elif defined(__ARM_ARCH_6T2__) \375 || defined(__ARM_ARCH_7__) \376 || defined(__ARM_ARCH_7A__) \377 || defined(__ARM_ARCH_7R__) \378 || defined(__ARM_ARCH_7M__)379 #define THUMB_ARCH_VERSION 4380 381 /* RVCT sets __TARGET_ARCH_THUMB */382 #elif defined(__TARGET_ARCH_THUMB)383 #define THUMB_ARCH_VERSION __TARGET_ARCH_THUMB384 385 #else386 #define THUMB_ARCH_VERSION 0387 #endif388 389 /* On ARMv5 and below the natural alignment is required. */390 #if !defined(ARM_REQUIRE_NATURAL_ALIGNMENT) && ARM_ARCH_VERSION <= 5391 #define ARM_REQUIRE_NATURAL_ALIGNMENT 1392 #endif393 394 /* Defines two pseudo-platforms for ARM and Thumb-2 instruction set. */395 #if !defined(WTF_PLATFORM_ARM_TRADITIONAL) && !defined(WTF_PLATFORM_ARM_THUMB2)396 # if defined(thumb2) || defined(__thumb2__) \397 || ((defined(__thumb) || defined(__thumb__)) && THUMB_ARCH_VERSION == 4)398 # define WTF_PLATFORM_ARM_TRADITIONAL 0399 # define WTF_PLATFORM_ARM_THUMB2 1400 # elif PLATFORM_ARM_ARCH(4)401 # define WTF_PLATFORM_ARM_TRADITIONAL 1402 # define WTF_PLATFORM_ARM_THUMB2 0403 # else404 # error "Not supported ARM architecture"405 # endif406 #elif PLATFORM(ARM_TRADITIONAL) && PLATFORM(ARM_THUMB2) /* Sanity Check */407 # error "Cannot use both of WTF_PLATFORM_ARM_TRADITIONAL and WTF_PLATFORM_ARM_THUMB2 platforms"408 #endif // !defined(ARM_TRADITIONAL) && !defined(ARM_THUMB2)409 #endif /* ARM */410 411 /* PLATFORM(X86) */412 #if defined(__i386__) \413 || defined(i386) \414 || defined(_M_IX86) \415 || defined(_X86_) \416 || defined(__THW_INTEL)417 #define WTF_PLATFORM_X86 1418 #endif419 420 /* PLATFORM(X86_64) */421 #if defined(__x86_64__) \422 || defined(_M_X64)423 #define WTF_PLATFORM_X86_64 1424 #endif425 426 /* PLATFORM(IA64) */427 #if defined(__ia64__)428 #define WTF_PLATFORM_IA64 1429 #endif430 431 /* PLATFORM(ALPHA) */432 #if defined(__alpha__)433 #define WTF_PLATFORM_ALPHA 1434 #endif435 436 /* PLATFORM(SH4) */437 #if defined(__SH4__)438 #define WTF_PLATFORM_SH4 1439 #endif440 441 /* PLATFORM(SPARC64) */442 #if defined(__sparc__) && defined(__arch64__) || defined (__sparcv9)443 #define WTF_PLATFORM_SPARC64 1444 #define WTF_PLATFORM_BIG_ENDIAN 1445 #endif446 461 447 462 /* PLATFORM(WINCE) && PLATFORM(QT) … … 511 526 #define WTF_USE_PTHREADS 1 512 527 #define HAVE_PTHREAD_RWLOCK 1 513 #if !defined(BUILDING_ON_LEOPARD) && !defined(BUILDING_ON_TIGER) && defined(__x86_64__)528 #if !defined(BUILDING_ON_LEOPARD) && !defined(BUILDING_ON_TIGER) && CPU(X86_64) 514 529 #define WTF_USE_PLUGIN_HOST_PROCESS 1 515 530 #endif … … 776 791 777 792 #if !defined(WTF_USE_JSVALUE64) && !defined(WTF_USE_JSVALUE32) && !defined(WTF_USE_JSVALUE32_64) 778 #if ( PLATFORM(X86_64) && (PLATFORM(UNIX) || PLATFORM(WIN_OS))) || PLATFORM(IA64) || PLATFORM(ALPHA)793 #if (CPU(X86_64) && (PLATFORM(UNIX) || PLATFORM(WIN_OS))) || CPU(IA64) || CPU(ALPHA) 779 794 #define WTF_USE_JSVALUE64 1 780 #elif PLATFORM(ARM) || PLATFORM(PPC64)795 #elif CPU(ARM) || CPU(PPC64) 781 796 #define WTF_USE_JSVALUE32 1 782 797 #elif PLATFORM(WIN_OS) && COMPILER(MINGW) … … 796 811 797 812 /* The JIT is tested & working on x86_64 Mac */ 798 #if PLATFORM(X86_64) && PLATFORM(MAC)813 #if CPU(X86_64) && PLATFORM(MAC) 799 814 #define ENABLE_JIT 1 800 815 /* The JIT is tested & working on x86 Mac */ 801 #elif PLATFORM(X86) && PLATFORM(MAC)816 #elif CPU(X86) && PLATFORM(MAC) 802 817 #define ENABLE_JIT 1 803 818 #define WTF_USE_JIT_STUB_ARGUMENT_VA_LIST 1 804 #elif PLATFORM(ARM_THUMB2) && PLATFORM(IPHONE)819 #elif CPU(ARM_THUMB2) && PLATFORM(IPHONE) 805 820 #define ENABLE_JIT 1 806 821 /* The JIT is tested & working on x86 Windows */ 807 #elif PLATFORM(X86) && PLATFORM(WIN)822 #elif CPU(X86) && PLATFORM(WIN) 808 823 #define ENABLE_JIT 1 809 824 #endif 810 825 811 826 #if PLATFORM(QT) 812 #if PLATFORM(X86_64) && PLATFORM(DARWIN)827 #if CPU(X86_64) && PLATFORM(DARWIN) 813 828 #define ENABLE_JIT 1 814 #elif PLATFORM(X86) && PLATFORM(DARWIN)829 #elif CPU(X86) && PLATFORM(DARWIN) 815 830 #define ENABLE_JIT 1 816 831 #define WTF_USE_JIT_STUB_ARGUMENT_VA_LIST 1 817 #elif PLATFORM(X86) && PLATFORM(WIN_OS) && COMPILER(MINGW) && GCC_VERSION >= 40100832 #elif CPU(X86) && PLATFORM(WIN_OS) && COMPILER(MINGW) && GCC_VERSION >= 40100 818 833 #define ENABLE_JIT 1 819 834 #define WTF_USE_JIT_STUB_ARGUMENT_VA_LIST 1 820 #elif PLATFORM(X86) && PLATFORM(WIN_OS) && COMPILER(MSVC)835 #elif CPU(X86) && PLATFORM(WIN_OS) && COMPILER(MSVC) 821 836 #define ENABLE_JIT 1 822 837 #define WTF_USE_JIT_STUB_ARGUMENT_REGISTER 1 823 #elif PLATFORM(X86) && PLATFORM(LINUX) && GCC_VERSION >= 40100838 #elif CPU(X86) && PLATFORM(LINUX) && GCC_VERSION >= 40100 824 839 #define ENABLE_JIT 1 825 840 #define WTF_USE_JIT_STUB_ARGUMENT_VA_LIST 1 826 #elif PLATFORM(ARM_TRADITIONAL) && PLATFORM(LINUX)841 #elif CPU(ARM_TRADITIONAL) && PLATFORM(LINUX) 827 842 #define ENABLE_JIT 1 828 843 #endif … … 846 861 #endif 847 862 848 #if PLATFORM(X86) && COMPILER(MSVC)863 #if CPU(X86) && COMPILER(MSVC) 849 864 #define JSC_HOST_CALL __fastcall 850 #elif PLATFORM(X86) && COMPILER(GCC)865 #elif CPU(X86) && COMPILER(GCC) 851 866 #define JSC_HOST_CALL __attribute__ ((fastcall)) 852 867 #else … … 868 883 869 884 /* YARR supports x86 & x86-64, and has been tested on Mac and Windows. */ 870 #if ( PLATFORM(X86) && PLATFORM(MAC)) \871 || ( PLATFORM(X86_64) && PLATFORM(MAC)) \872 || ( PLATFORM(ARM_THUMB2) && PLATFORM(IPHONE)) \873 || ( PLATFORM(X86) && PLATFORM(WIN))885 #if (CPU(X86) && PLATFORM(MAC)) \ 886 || (CPU(X86_64) && PLATFORM(MAC)) \ 887 || (CPU(ARM_THUMB2) && PLATFORM(IPHONE)) \ 888 || (CPU(X86) && PLATFORM(WIN)) 874 889 #define ENABLE_YARR 1 875 890 #define ENABLE_YARR_JIT 1 … … 877 892 878 893 #if PLATFORM(QT) 879 #if ( PLATFORM(X86) && PLATFORM(WIN_OS) && COMPILER(MINGW) && GCC_VERSION >= 40100) \880 || ( PLATFORM(X86) && PLATFORM(WIN_OS) && COMPILER(MSVC)) \881 || ( PLATFORM(X86) && PLATFORM(LINUX) && GCC_VERSION >= 40100) \882 || ( PLATFORM(ARM_TRADITIONAL) && PLATFORM(LINUX))894 #if (CPU(X86) && PLATFORM(WIN_OS) && COMPILER(MINGW) && GCC_VERSION >= 40100) \ 895 || (CPU(X86) && PLATFORM(WIN_OS) && COMPILER(MSVC)) \ 896 || (CPU(X86) && PLATFORM(LINUX) && GCC_VERSION >= 40100) \ 897 || (CPU(ARM_TRADITIONAL) && PLATFORM(LINUX)) 883 898 #define ENABLE_YARR 1 884 899 #define ENABLE_YARR_JIT 1 -
trunk/JavaScriptCore/wtf/TCSpinLock.h
r48731 r52729 34 34 #define TCMALLOC_INTERNAL_SPINLOCK_H__ 35 35 36 #if ( PLATFORM(X86) || PLATFORM(PPC)) && (COMPILER(GCC) || COMPILER(MSVC))36 #if (CPU(X86) || CPU(PPC)) && (COMPILER(GCC) || COMPILER(MSVC)) 37 37 38 38 #include <time.h> /* For nanosleep() */ … … 63 63 int r; 64 64 #if COMPILER(GCC) 65 #if PLATFORM(X86)65 #if CPU(X86) 66 66 __asm__ __volatile__ 67 67 ("xchgl %0, %1" … … 93 93 inline void Unlock() { 94 94 #if COMPILER(GCC) 95 #if PLATFORM(X86)95 #if CPU(X86) 96 96 __asm__ __volatile__ 97 97 ("movl $0, %0" … … 104 104 "eieio\n\t" 105 105 "stw %1, %0" 106 #if PLATFORM(DARWIN) || PLATFORM(PPC)106 #if PLATFORM(DARWIN) || CPU(PPC) 107 107 : "=o" (lockword_) 108 108 #else … … 139 139 int r; 140 140 #if COMPILER(GCC) 141 #if PLATFORM(X86)141 #if CPU(X86) 142 142 __asm__ __volatile__ 143 143 ("xchgl %0, %1" -
trunk/JavaScriptCore/wtf/Threading.h
r51423 r52729 240 240 inline int atomicDecrement(int volatile* addend) { return android_atomic_dec(addend); } 241 241 242 #elif COMPILER(GCC) && ! PLATFORM(SPARC64) // sizeof(_Atomic_word) != sizeof(int) on sparc64 gcc242 #elif COMPILER(GCC) && !CPU(SPARC64) // sizeof(_Atomic_word) != sizeof(int) on sparc64 gcc 243 243 #define WTF_USE_LOCKFREE_THREADSAFESHARED 1 244 244 -
trunk/JavaScriptCore/wtf/dtoa.cpp
r52162 r52729 160 160 #endif 161 161 162 #if PLATFORM(BIG_ENDIAN)162 #if CPU(BIG_ENDIAN) 163 163 #define IEEE_MC68k 164 #elif PLATFORM(MIDDLE_ENDIAN)164 #elif CPU(MIDDLE_ENDIAN) 165 165 #define IEEE_ARM 166 166 #else … … 263 263 #endif 264 264 265 #if PLATFORM(PPC64) || PLATFORM(X86_64) 265 #if CPU(PPC64) || CPU(X86_64) 266 // FIXME: should we enable this on all 64-bit CPUs? 266 267 // 64-bit emulation provided by the compiler is likely to be slower than dtoa own code on 32-bit hardware. 267 268 #define USE_LONG_LONG -
trunk/JavaScriptCore/yarr/RegexJIT.cpp
r50143 r52729 45 45 friend void jitCompileRegex(JSGlobalData* globalData, RegexCodeBlock& jitObject, const UString& pattern, unsigned& numSubpatterns, const char*& error, bool ignoreCase, bool multiline); 46 46 47 #if PLATFORM(ARM)47 #if CPU(ARM) 48 48 static const RegisterID input = ARMRegisters::r0; 49 49 static const RegisterID index = ARMRegisters::r1; … … 55 55 56 56 static const RegisterID returnRegister = ARMRegisters::r0; 57 #elif PLATFORM(X86)57 #elif CPU(X86) 58 58 static const RegisterID input = X86Registers::eax; 59 59 static const RegisterID index = X86Registers::edx; … … 65 65 66 66 static const RegisterID returnRegister = X86Registers::eax; 67 #elif PLATFORM(X86_64)67 #elif CPU(X86_64) 68 68 static const RegisterID input = X86Registers::edi; 69 69 static const RegisterID index = X86Registers::esi; … … 1289 1289 void generateEnter() 1290 1290 { 1291 #if PLATFORM(X86_64)1291 #if CPU(X86_64) 1292 1292 push(X86Registers::ebp); 1293 1293 move(stackPointerRegister, X86Registers::ebp); 1294 1294 push(X86Registers::ebx); 1295 #elif PLATFORM(X86)1295 #elif CPU(X86) 1296 1296 push(X86Registers::ebp); 1297 1297 move(stackPointerRegister, X86Registers::ebp); … … 1309 1309 loadPtr(Address(X86Registers::ebp, 2 * sizeof(void*)), output); 1310 1310 #endif 1311 #elif PLATFORM(ARM)1311 #elif CPU(ARM) 1312 1312 push(ARMRegisters::r4); 1313 1313 push(ARMRegisters::r5); … … 1319 1319 void generateReturn() 1320 1320 { 1321 #if PLATFORM(X86_64)1321 #if CPU(X86_64) 1322 1322 pop(X86Registers::ebx); 1323 1323 pop(X86Registers::ebp); 1324 #elif PLATFORM(X86)1324 #elif CPU(X86) 1325 1325 pop(X86Registers::esi); 1326 1326 pop(X86Registers::edi); 1327 1327 pop(X86Registers::ebx); 1328 1328 pop(X86Registers::ebp); 1329 #elif PLATFORM(ARM)1329 #elif CPU(ARM) 1330 1330 pop(ARMRegisters::r6); 1331 1331 pop(ARMRegisters::r5); -
trunk/JavaScriptCore/yarr/RegexJIT.h
r49365 r52729 38 38 struct JSRegExp; // temporary, remove when fallback is removed. 39 39 40 #if PLATFORM(X86) && !COMPILER(MSVC)40 #if CPU(X86) && !COMPILER(MSVC) 41 41 #define YARR_CALL __attribute__ ((regparm (3))) 42 42 #else -
trunk/WebCore/ChangeLog
r52727 r52729 1 2010-01-04 Maciej Stachowiak <mjs@apple.com> 2 3 Reviewed by Adam Barth. 4 5 Reorganize, document and rename CPU() platform macros. 6 https://bugs.webkit.org/show_bug.cgi?id=33145 7 8 * page/NavigatorBase.cpp: 9 * platform/text/AtomicString.cpp: 10 (WebCore::equal): 11 * platform/text/StringHash.h: 12 (WebCore::StringHash::equal): 13 1 14 2009-12-22 Philippe Normand <pnormand@igalia.com> 2 15 -
trunk/WebCore/page/NavigatorBase.cpp
r46078 r52729 36 36 37 37 #ifndef WEBCORE_NAVIGATOR_PLATFORM 38 #if PLATFORM(MAC) && ( PLATFORM(PPC) || PLATFORM(PPC64))38 #if PLATFORM(MAC) && (CPU(PPC) || CPU(PPC64)) 39 39 #define WEBCORE_NAVIGATOR_PLATFORM "MacPPC" 40 #elif PLATFORM(MAC) && ( PLATFORM(X86) || PLATFORM(X86_64))40 #elif PLATFORM(MAC) && (CPU(X86) || CPU(X86_64)) 41 41 #define WEBCORE_NAVIGATOR_PLATFORM "MacIntel" 42 42 #elif PLATFORM(WIN_OS) -
trunk/WebCore/platform/text/AtomicString.cpp
r49798 r52729 104 104 return false; 105 105 106 #if PLATFORM(ARM) || PLATFORM(SH4) 106 // FIXME: perhaps we should have a more abstract macro that indicates when 107 // going 4 bytes at a time is unsafe 108 #if CPU(ARM) || CPU(SH4) 107 109 const UChar* stringCharacters = string->characters(); 108 110 for (unsigned i = 0; i != length; ++i) { -
trunk/WebCore/platform/text/StringHash.h
r51006 r52729 53 53 return false; 54 54 55 #if PLATFORM(ARM) || PLATFORM(SH4) 55 // FIXME: perhaps we should have a more abstract macro that indicates when 56 // going 4 bytes at a time is unsafe 57 #if CPU(ARM) || CPU(SH4) 56 58 const UChar* aChars = a->characters(); 57 59 const UChar* bChars = b->characters(); -
trunk/WebKit/gtk/ChangeLog
r52428 r52729 1 2010-01-04 Maciej Stachowiak <mjs@apple.com> 2 3 Reviewed by Adam Barth. 4 5 Reorganize, document and rename CPU() platform macros. 6 https://bugs.webkit.org/show_bug.cgi?id=33145 7 8 * webkit/webkitwebsettings.cpp: 9 (webkit_get_user_agent): 10 1 11 2009-12-20 Gustavo Noronha Silva <gustavo.noronha@collabora.co.uk> 2 12 -
trunk/WebKit/gtk/webkit/webkitwebsettings.cpp
r52424 r52729 174 174 #if PLATFORM(DARWIN) 175 175 176 #if PLATFORM(X86)176 #if CPU(X86) 177 177 osVersion = g_strdup("Intel Mac OS X"); 178 178 #else
Note: See TracChangeset
for help on using the changeset viewer.