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Changeset 290882 in webkit


Ignore:
Timestamp:
Mar 7, 2022, 3:47:23 AM (5 years ago)
Author:
commit-queue@webkit.org
Message:

[JSC] Add missing CPU(RISCV64) guards in CTI thunk prologue, epilogue generators
​https://bugs.webkit.org/show_bug.cgi?id=237517

Unreviewed, adding missing CPU(RISCV64) guards to the CTI thunk prologue
and epilogue generators in CCallHelpers, reusing the ARM variants of the
pair push/pop calls.

Patch by Zan Dobersek <​zdobersek@igalia.com> on 2022-03-07

  • jit/CCallHelpers.cpp:

(JSC::CCallHelpers::emitCTIThunkPrologue):
(JSC::CCallHelpers::emitCTIThunkEpilogue):

Location:
trunk/Source/JavaScriptCore
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/Source/JavaScriptCore/ChangeLog

    r290873 r290882  
     12022-03-07  Zan Dobersek  <zdobersek@igalia.com>
     2
     3        [JSC] Add missing CPU(RISCV64) guards in CTI thunk prologue, epilogue generators
     4        https://bugs.webkit.org/show_bug.cgi?id=237517
     5
     6        Unreviewed, adding missing CPU(RISCV64) guards to the CTI thunk prologue
     7        and epilogue generators in CCallHelpers, reusing the ARM variants of the
     8        pair push/pop calls.
     9
     10        * jit/CCallHelpers.cpp:
     11        (JSC::CCallHelpers::emitCTIThunkPrologue):
     12        (JSC::CCallHelpers::emitCTIThunkEpilogue):
     13
    1142022-03-05  Mark Lam  <mark.lam@apple.com>
    215
  • trunk/Source/JavaScriptCore/jit/CCallHelpers.cpp

    r290647 r290882  
    105105#if CPU(X86_64)
    106106    push(X86Registers::ebp); // return address pushed by the call instruction
    107 #elif CPU(ARM64) || CPU(ARM_THUMB2)
     107#elif CPU(ARM64) || CPU(ARM_THUMB2) || CPU(RISCV64)
    108108    pushPair(framePointerRegister, linkRegister);
    109109#elif CPU(MIPS)
    … …  
    125125#if CPU(X86_64)
    126126    pop(X86Registers::ebp); // Return address left on stack
    127 #elif CPU(ARM64) || CPU(ARM_THUMB2)
     127#elif CPU(ARM64) || CPU(ARM_THUMB2) || CPU(RISCV64)
    128128    popPair(framePointerRegister, linkRegister);
    129129#elif CPU(MIPS)
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