Changeset 176072 in webkit
- Timestamp:
- Nov 13, 2014 8:43:05 AM (9 years ago)
- Location:
- trunk/Source/JavaScriptCore
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/Source/JavaScriptCore/ChangeLog
r176035 r176072 1 2014-11-12 Mark Lam <mark.lam@apple.com> 2 3 Create canonical lists of registers used by both the Assemblers and the JIT probes. 4 <https://webkit.org/b/138681> 5 6 Reviewed by Filip Pizlo. 7 8 * assembler/ARMAssembler.h: 9 * assembler/ARMv7Assembler.h: 10 * assembler/X86Assembler.h: 11 - The FP register storage type is still defined as __m128 because the JIT 12 probe code still expects that amount of storage to be available. Will 13 change this to double when the JIT probe code is updated accordingly in a 14 later patch. 15 1 16 2014-11-12 Andreas Kling <akling@apple.com> 2 17 -
trunk/Source/JavaScriptCore/assembler/ARMAssembler.h
r176031 r176072 37 37 typedef uint32_t ARMWord; 38 38 39 namespace ARMRegisters {40 typedef enum {41 r0 = 0,42 r1,43 r2,44 r3,45 r4,46 r5,47 r6, S0 = r6,48 r7,49 r8,50 r9,51 r10,52 r11, fp = r11, // frame pointer53 r12, ip = r12, S1 = r12,54 r13, sp = r13,55 r14, lr = r14,56 r15, pc = r1557 } RegisterID;58 59 typedef enum {60 d0,61 d1,62 d2,63 d3,64 d4,65 d5,66 d6,67 d7, SD0 = d7, /* Same as thumb assembler. */68 d8,69 d9,70 d10,71 d11,72 d12,73 d13,74 d14,75 d15,76 d16,77 d17,78 d18,79 d19,80 d20,81 d21,82 d22,83 d23,84 d24,85 d25,86 d26,87 d27,88 d28,89 d29,90 d30,91 d3192 } FPRegisterID;93 94 #if ENABLE(MASM_PROBE)95 39 #define FOR_EACH_CPU_REGISTER(V) \ 96 40 FOR_EACH_CPU_GPREGISTER(V) \ … … 110 54 V(void*, r9) \ 111 55 V(void*, r10) \ 112 V(void*, r11) \56 V(void*, fp) \ 113 57 V(void*, ip) \ 114 58 V(void*, sp) \ 115 59 V(void*, lr) \ 116 V(void*, pc) 60 V(void*, pc) \ 117 61 118 62 #define FOR_EACH_CPU_SPECIAL_REGISTER(V) \ … … 136 80 V(double, d13) \ 137 81 V(double, d14) \ 138 V(double, d15) 139 #endif // ENABLE(MASM_PROBE) 82 V(double, d15) \ 83 V(double, d16) \ 84 V(double, d17) \ 85 V(double, d18) \ 86 V(double, d19) \ 87 V(double, d20) \ 88 V(double, d21) \ 89 V(double, d22) \ 90 V(double, d23) \ 91 V(double, d24) \ 92 V(double, d25) \ 93 V(double, d26) \ 94 V(double, d27) \ 95 V(double, d28) \ 96 V(double, d29) \ 97 V(double, d30) \ 98 V(double, d31) \ 99 100 namespace ARMRegisters { 101 102 typedef enum { 103 #define DECLARE_REGISTER(_type, _regName) _regName, 104 FOR_EACH_CPU_GPREGISTER(DECLARE_REGISTER) 105 #undef DECLARE_REGISTER 106 107 // Pseudonyms for some of the registers. 108 S0 = r6, 109 r11 = fp, // frame pointer 110 r12 = ip, S1 = ip, 111 r13 = sp, 112 r14 = lr, 113 r15 = pc 114 } RegisterID; 115 116 typedef enum { 117 #define DECLARE_REGISTER(_type, _regName) _regName, 118 FOR_EACH_CPU_FPREGISTER(DECLARE_REGISTER) 119 #undef DECLARE_REGISTER 120 121 // Pseudonyms for some of the registers. 122 SD0 = d7, /* Same as thumb assembler. */ 123 } FPRegisterID; 124 140 125 } // namespace ARMRegisters 141 126 -
trunk/Source/JavaScriptCore/assembler/ARMv7Assembler.h
r176031 r176072 39 39 40 40 namespace ARMRegisters { 41 42 #define FOR_EACH_CPU_REGISTER(V) \ 43 FOR_EACH_CPU_GPREGISTER(V) \ 44 FOR_EACH_CPU_SPECIAL_REGISTER(V) \ 45 FOR_EACH_CPU_FPREGISTER(V) 46 47 // The following are defined as pairs of the following value: 48 // 1. type of the storage needed to save the register value by the JIT probe. 49 // 2. name of the register. 50 #define FOR_EACH_CPU_GPREGISTER(V) \ 51 V(void*, r0) \ 52 V(void*, r1) \ 53 V(void*, r2) \ 54 V(void*, r3) \ 55 V(void*, r4) \ 56 V(void*, r5) \ 57 V(void*, r6) \ 58 V(void*, r7) \ 59 V(void*, r8) \ 60 V(void*, r9) \ 61 V(void*, r10) \ 62 V(void*, r11) \ 63 V(void*, ip) \ 64 V(void*, sp) \ 65 V(void*, lr) \ 66 V(void*, pc) 67 68 #define FOR_EACH_CPU_SPECIAL_REGISTER(V) \ 69 V(void*, apsr) \ 70 V(void*, fpscr) \ 71 72 #define FOR_EACH_CPU_FPREGISTER(V) \ 73 V(double, d0) \ 74 V(double, d1) \ 75 V(double, d2) \ 76 V(double, d3) \ 77 V(double, d4) \ 78 V(double, d5) \ 79 V(double, d6) \ 80 V(double, d7) \ 81 V(double, d8) \ 82 V(double, d9) \ 83 V(double, d10) \ 84 V(double, d11) \ 85 V(double, d12) \ 86 V(double, d13) \ 87 V(double, d14) \ 88 V(double, d15) \ 89 V(double, d16) \ 90 V(double, d17) \ 91 V(double, d18) \ 92 V(double, d19) \ 93 V(double, d20) \ 94 V(double, d21) \ 95 V(double, d22) \ 96 V(double, d23) \ 97 V(double, d24) \ 98 V(double, d25) \ 99 V(double, d26) \ 100 V(double, d27) \ 101 V(double, d28) \ 102 V(double, d29) \ 103 V(double, d30) \ 104 V(double, d31) 105 41 106 typedef enum { 42 r0, 43 r1, 44 r2, 45 r3, 46 r4, 47 r5, 48 r6, 49 r7, fp = r7, // frame pointer 50 r8, 51 r9, sb = r9, // static base 52 r10, sl = r10, // stack limit 53 r11, 54 r12, ip = r12, 55 r13, sp = r13, 56 r14, lr = r14, 57 r15, pc = r15, 107 #define DECLARE_REGISTER(_type, _regName) _regName, 108 FOR_EACH_CPU_GPREGISTER(DECLARE_REGISTER) 109 #undef DECLARE_REGISTER 110 111 fp = r7, // frame pointer 112 sb = r9, // static base 113 sl = r10, // stack limit 114 r12 = ip, 115 r13 = sp, 116 r14 = lr, 117 r15 = pc 58 118 } RegisterID; 59 119 … … 94 154 95 155 typedef enum { 96 d0, 97 d1, 98 d2, 99 d3, 100 d4, 101 d5, 102 d6, 103 d7, 104 d8, 105 d9, 106 d10, 107 d11, 108 d12, 109 d13, 110 d14, 111 d15, 112 d16, 113 d17, 114 d18, 115 d19, 116 d20, 117 d21, 118 d22, 119 d23, 120 d24, 121 d25, 122 d26, 123 d27, 124 d28, 125 d29, 126 d30, 127 d31, 156 #define DECLARE_REGISTER(_type, _regName) _regName, 157 FOR_EACH_CPU_FPREGISTER(DECLARE_REGISTER) 158 #undef DECLARE_REGISTER 128 159 } FPDoubleRegisterID; 129 160 … … 175 206 } 176 207 177 #if ENABLE(MASM_PROBE) 178 #define FOR_EACH_CPU_REGISTER(V) \ 179 FOR_EACH_CPU_GPREGISTER(V) \ 180 FOR_EACH_CPU_SPECIAL_REGISTER(V) \ 181 FOR_EACH_CPU_FPREGISTER(V) 182 183 #define FOR_EACH_CPU_GPREGISTER(V) \ 184 V(void*, r0) \ 185 V(void*, r1) \ 186 V(void*, r2) \ 187 V(void*, r3) \ 188 V(void*, r4) \ 189 V(void*, r5) \ 190 V(void*, r6) \ 191 V(void*, r7) \ 192 V(void*, r8) \ 193 V(void*, r9) \ 194 V(void*, r10) \ 195 V(void*, r11) \ 196 V(void*, ip) \ 197 V(void*, sp) \ 198 V(void*, lr) \ 199 V(void*, pc) 200 201 #define FOR_EACH_CPU_SPECIAL_REGISTER(V) \ 202 V(void*, apsr) \ 203 V(void*, fpscr) \ 204 205 #define FOR_EACH_CPU_FPREGISTER(V) \ 206 V(double, d0) \ 207 V(double, d1) \ 208 V(double, d2) \ 209 V(double, d3) \ 210 V(double, d4) \ 211 V(double, d5) \ 212 V(double, d6) \ 213 V(double, d7) \ 214 V(double, d8) \ 215 V(double, d9) \ 216 V(double, d10) \ 217 V(double, d11) \ 218 V(double, d12) \ 219 V(double, d13) \ 220 V(double, d14) \ 221 V(double, d15) \ 222 FOR_EACH_CPU_FPREGISTER_EXTENSION(V) 223 224 #if CPU(APPLE_ARMV7S) 225 #define FOR_EACH_CPU_FPREGISTER_EXTENSION(V) \ 226 V(double, d16) \ 227 V(double, d17) \ 228 V(double, d18) \ 229 V(double, d19) \ 230 V(double, d20) \ 231 V(double, d21) \ 232 V(double, d22) \ 233 V(double, d23) \ 234 V(double, d24) \ 235 V(double, d25) \ 236 V(double, d26) \ 237 V(double, d27) \ 238 V(double, d28) \ 239 V(double, d29) \ 240 V(double, d30) \ 241 V(double, d31) 242 #else 243 #define FOR_EACH_CPU_FPREGISTER_EXTENSION(V) // Nothing to add. 244 #endif // CPU(APPLE_ARMV7S) 245 246 #endif // ENABLE(MASM_PROBE) 247 } 208 } // namespace ARMRegister 248 209 249 210 class ARMv7Assembler; -
trunk/Source/JavaScriptCore/assembler/X86Assembler.h
r176031 r176072 45 45 46 46 namespace X86Registers { 47 typedef enum { 48 eax, 49 ecx, 50 edx, 51 ebx, 52 esp, 53 ebp, 54 esi, 55 edi, 56 57 #if CPU(X86_64) 58 r8, 59 r9, 60 r10, 61 r11, 62 r12, 63 r13, 64 r14, 65 r15, 66 #endif 67 } RegisterID; 68 69 typedef enum { 70 xmm0, 71 xmm1, 72 xmm2, 73 xmm3, 74 xmm4, 75 xmm5, 76 xmm6, 77 xmm7, 78 79 #if CPU(X86_64) 80 xmm8, 81 xmm9, 82 xmm10, 83 xmm11, 84 xmm12, 85 xmm13, 86 xmm14, 87 xmm15, 88 #endif 89 } XMMRegisterID; 90 91 #if ENABLE(MASM_PROBE) 92 #define FOR_EACH_CPU_REGISTER(V) \ 93 FOR_EACH_CPU_GPREGISTER(V) \ 94 FOR_EACH_CPU_SPECIAL_REGISTER(V) \ 95 FOR_EACH_CPU_FPREGISTER(V) 96 97 #define FOR_EACH_CPU_GPREGISTER(V) \ 98 V(void*, eax) \ 99 V(void*, ebx) \ 100 V(void*, ecx) \ 101 V(void*, edx) \ 102 V(void*, esi) \ 103 V(void*, edi) \ 104 V(void*, ebp) \ 105 V(void*, esp) \ 106 FOR_EACH_X86_64_CPU_GPREGISTER(V) 107 108 #define FOR_EACH_CPU_SPECIAL_REGISTER(V) \ 109 V(void*, eip) \ 110 V(void*, eflags) \ 111 112 #define FOR_EACH_CPU_FPREGISTER(V) \ 113 V(__m128, xmm0) \ 114 V(__m128, xmm1) \ 115 V(__m128, xmm2) \ 116 V(__m128, xmm3) \ 117 V(__m128, xmm4) \ 118 V(__m128, xmm5) \ 119 V(__m128, xmm6) \ 120 V(__m128, xmm7) 47 48 #define FOR_EACH_CPU_REGISTER(V) \ 49 FOR_EACH_CPU_GPREGISTER(V) \ 50 FOR_EACH_CPU_SPECIAL_REGISTER(V) \ 51 FOR_EACH_CPU_FPREGISTER(V) 52 53 // The following are defined as pairs of the following value: 54 // 1. type of the storage needed to save the register value by the JIT probe. 55 // 2. name of the register. 56 #define FOR_EACH_CPU_GPREGISTER(V) \ 57 V(void*, eax) \ 58 V(void*, ecx) \ 59 V(void*, edx) \ 60 V(void*, ebx) \ 61 V(void*, esp) \ 62 V(void*, ebp) \ 63 V(void*, esi) \ 64 V(void*, edi) \ 65 FOR_EACH_X86_64_CPU_GPREGISTER(V) 66 67 #define FOR_EACH_CPU_SPECIAL_REGISTER(V) \ 68 V(void*, eip) \ 69 V(void*, eflags) \ 70 71 // Note: the JITs only stores double values in the FP registers. However, the 72 // storage type here is defined as __m128 because the JIT probe code which does 73 // the storing still expects a __m128 slot. This will be changed when the JIT 74 // probe code is updated later to reflect the JITs' usage of these registers. 75 #define FOR_EACH_CPU_FPREGISTER(V) \ 76 V(__m128, xmm0) \ 77 V(__m128, xmm1) \ 78 V(__m128, xmm2) \ 79 V(__m128, xmm3) \ 80 V(__m128, xmm4) \ 81 V(__m128, xmm5) \ 82 V(__m128, xmm6) \ 83 V(__m128, xmm7) \ 84 FOR_EACH_X86_64_CPU_FPREGISTER(V) 121 85 122 86 #if CPU(X86) 123 #define FOR_EACH_X86_64_CPU_GPREGISTER(V) // Nothing to add. 87 88 #define FOR_EACH_X86_64_CPU_GPREGISTER(V) // Nothing to add. 89 #define FOR_EACH_X86_64_CPU_FPREGISTER(V) // Nothing to add. 90 124 91 #elif CPU(X86_64) 125 #define FOR_EACH_X86_64_CPU_GPREGISTER(V) \ 126 V(void*, r8) \ 127 V(void*, r9) \ 128 V(void*, r10) \ 129 V(void*, r11) \ 130 V(void*, r12) \ 131 V(void*, r13) \ 132 V(void*, r14) \ 133 V(void*, r15) 92 93 #define FOR_EACH_X86_64_CPU_GPREGISTER(V) \ 94 V(void*, r8) \ 95 V(void*, r9) \ 96 V(void*, r10) \ 97 V(void*, r11) \ 98 V(void*, r12) \ 99 V(void*, r13) \ 100 V(void*, r14) \ 101 V(void*, r15) 102 103 #define FOR_EACH_X86_64_CPU_FPREGISTER(V) \ 104 V(__m128, xmm8) \ 105 V(__m128, xmm9) \ 106 V(__m128, xmm10) \ 107 V(__m128, xmm11) \ 108 V(__m128, xmm12) \ 109 V(__m128, xmm13) \ 110 V(__m128, xmm14) \ 111 V(__m128, xmm15) 112 134 113 #endif // CPU(X86_64) 135 #endif // ENABLE(MASM_PROBE) 136 } 114 115 typedef enum { 116 #define DECLARE_REGISTER(_type, _regName) _regName, 117 FOR_EACH_CPU_GPREGISTER(DECLARE_REGISTER) 118 #undef DECLARE_REGISTER 119 } RegisterID; 120 121 typedef enum { 122 #define DECLARE_REGISTER(_type, _regName) _regName, 123 FOR_EACH_CPU_FPREGISTER(DECLARE_REGISTER) 124 #undef DECLARE_REGISTER 125 } XMMRegisterID; 126 127 } // namespace X86Register 137 128 138 129 class X86Assembler {
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