Changeset 158580 in webkit
- Timestamp:
- Nov 4, 2013 10:21:37 AM (10 years ago)
- Location:
- trunk/Source/JavaScriptCore
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/Source/JavaScriptCore/ChangeLog
r158556 r158580 1 2013-11-04 Julien Brianceau <jbriance@cisco.com> 2 3 [sh4] Refactor jumps in baseline JIT to return label after the jump. 4 https://bugs.webkit.org/show_bug.cgi?id=123734 5 6 Reviewed by Michael Saboff. 7 8 Current implementation of jumps in sh4 baseline JIT returns a label on the jump itself 9 and not after it. This is not correct and leads to issues like infinite loop the DFG 10 (https://bugs.webkit.org/show_bug.cgi?id=122597 for instance). This refactor fixes this 11 and also simplifies the link and relink procedures for sh4 jumps. 12 13 * assembler/MacroAssemblerSH4.h: 14 (JSC::MacroAssemblerSH4::branchDouble): 15 (JSC::MacroAssemblerSH4::branchTrue): 16 (JSC::MacroAssemblerSH4::branchFalse): 17 * assembler/SH4Assembler.h: 18 (JSC::SH4Assembler::jmp): 19 (JSC::SH4Assembler::extraInstrForBranch): 20 (JSC::SH4Assembler::jne): 21 (JSC::SH4Assembler::je): 22 (JSC::SH4Assembler::bra): 23 (JSC::SH4Assembler::linkJump): 24 (JSC::SH4Assembler::relinkJump): 25 1 26 2013-11-03 Filip Pizlo <fpizlo@apple.com> 2 27 -
trunk/Source/JavaScriptCore/assembler/MacroAssemblerSH4.h
r157334 r158580 1455 1455 takeBranch.append(Jump(m_assembler.jne(), SH4Assembler::JumpNear)); 1456 1456 m_assembler.dcmppeq(left, right); 1457 Jump m_jump = Jump(m_assembler.je());1457 m_assembler.branch(BF_OPCODE, 2); 1458 1458 takeBranch.link(this); 1459 m_assembler.extraInstrForBranch(scratchReg3); 1460 return m_jump; 1459 return Jump(m_assembler.extraInstrForBranch(scratchReg3)); 1461 1460 } 1462 1461 … … 1469 1468 takeBranch.append(Jump(m_assembler.jne(), SH4Assembler::JumpNear)); 1470 1469 m_assembler.dcmppgt(right, left); 1471 Jump m_jump = Jump(m_assembler.je());1470 m_assembler.branch(BF_OPCODE, 2); 1472 1471 takeBranch.link(this); 1473 m_assembler.extraInstrForBranch(scratchReg3); 1474 return m_jump; 1472 return Jump(m_assembler.extraInstrForBranch(scratchReg3)); 1475 1473 } 1476 1474 … … 1488 1486 takeBranch.append(Jump(m_assembler.jne(), SH4Assembler::JumpNear)); 1489 1487 m_assembler.dcmppgt(left, right); 1490 Jump m_jump = Jump(m_assembler.je());1488 m_assembler.branch(BF_OPCODE, 2); 1491 1489 takeBranch.link(this); 1492 m_assembler.extraInstrForBranch(scratchReg3); 1493 return m_jump; 1490 return Jump(m_assembler.extraInstrForBranch(scratchReg3)); 1494 1491 } 1495 1492 … … 1507 1504 { 1508 1505 m_assembler.ensureSpace(m_assembler.maxInstructionSize + 6, sizeof(uint32_t)); 1509 Jump m_jump = Jump(m_assembler.je()); 1510 m_assembler.extraInstrForBranch(scratchReg3); 1511 return m_jump; 1506 m_assembler.branch(BF_OPCODE, 2); 1507 return Jump(m_assembler.extraInstrForBranch(scratchReg3)); 1512 1508 } 1513 1509 … … 1515 1511 { 1516 1512 m_assembler.ensureSpace(m_assembler.maxInstructionSize + 6, sizeof(uint32_t)); 1517 Jump m_jump = Jump(m_assembler.jne()); 1518 m_assembler.extraInstrForBranch(scratchReg3); 1519 return m_jump; 1513 m_assembler.branch(BT_OPCODE, 2); 1514 return Jump(m_assembler.extraInstrForBranch(scratchReg3)); 1520 1515 } 1521 1516 -
trunk/Source/JavaScriptCore/assembler/SH4Assembler.h
r157796 r158580 1252 1252 RegisterID scr = claimScratch(); 1253 1253 m_buffer.ensureSpace(maxInstructionSize + 4, sizeof(uint32_t)); 1254 AssemblerLabel label = m_buffer.label();1255 1254 loadConstantUnReusable(0x0, scr); 1256 1255 branch(BRAF_OPCODE, scr); 1257 1256 nop(); 1258 1257 releaseScratch(scr); 1259 return label;1260 } 1261 1262 voidextraInstrForBranch(RegisterID dst)1258 return m_buffer.label(); 1259 } 1260 1261 AssemblerLabel extraInstrForBranch(RegisterID dst) 1263 1262 { 1264 1263 loadConstantUnReusable(0x0, dst); 1264 branch(BRAF_OPCODE, dst); 1265 1265 nop(); 1266 nop();1266 return m_buffer.label(); 1267 1267 } 1268 1268 … … 1282 1282 AssemblerLabel jne() 1283 1283 { 1284 AssemblerLabel label = m_buffer.label();1285 1284 branch(BF_OPCODE, 0); 1286 return label;1285 return m_buffer.label(); 1287 1286 } 1288 1287 1289 1288 AssemblerLabel je() 1290 1289 { 1291 AssemblerLabel label = m_buffer.label();1292 1290 branch(BT_OPCODE, 0); 1293 return label;1291 return m_buffer.label(); 1294 1292 } 1295 1293 1296 1294 AssemblerLabel bra() 1297 1295 { 1298 AssemblerLabel label = m_buffer.label();1299 1296 branch(BRA_OPCODE, 0); 1300 return label;1297 return m_buffer.label(); 1301 1298 } 1302 1299 … … 1372 1369 ASSERT(from.isSet()); 1373 1370 1374 uint16_t* instructionPtr = getInstructionPtr(code, from.m_offset); 1375 uint16_t instruction = *instructionPtr; 1371 uint16_t* instructionPtr = getInstructionPtr(code, from.m_offset) - 3; 1376 1372 int offsetBits = (reinterpret_cast<uint32_t>(to) - reinterpret_cast<uint32_t>(code)) - from.m_offset; 1377 1373 1378 if (((instruction & 0xff00) == BT_OPCODE) || ((instruction & 0xff00) == BF_OPCODE)) { 1379 /* BT label ==> BF 2 1380 nop LDR reg 1381 nop braf @reg 1382 nop nop 1383 */ 1384 offsetBits -= 8; 1385 instruction ^= 0x0202; 1386 *instructionPtr++ = instruction; 1387 changePCrelativeAddress((*instructionPtr & 0xff), instructionPtr, offsetBits); 1388 instruction = (BRAF_OPCODE | (*instructionPtr++ & 0xf00)); 1389 *instructionPtr = instruction; 1390 printBlockInstr(instructionPtr - 2, from.m_offset, 3); 1391 return; 1392 } 1393 1394 /* MOV #imm, reg => LDR reg 1395 braf @reg braf @reg 1396 nop nop 1397 */ 1374 /* MOV #imm, reg => LDR reg 1375 braf @reg braf @reg 1376 nop nop 1377 */ 1398 1378 ASSERT((instructionPtr[0] & 0xf000) == MOVL_READ_OFFPC_OPCODE); 1399 1379 ASSERT((instructionPtr[1] & 0xf0ff) == BRAF_OPCODE); 1400 changePCrelativeAddress((*instructionPtr & 0xff), instructionPtr, offsetBits - 6);1380 changePCrelativeAddress((*instructionPtr & 0xff), instructionPtr, offsetBits); 1401 1381 printInstr(*instructionPtr, from.m_offset + 2); 1402 1382 } … … 1501 1481 { 1502 1482 uint16_t* instructionPtr = reinterpret_cast<uint16_t*> (from); 1503 uint16_t instruction = *instructionPtr; 1504 int32_t offsetBits = (reinterpret_cast<uint32_t>(to) - reinterpret_cast<uint32_t>(from)); 1505 1506 if (((*instructionPtr & 0xff00) == BT_OPCODE) || ((*instructionPtr & 0xff00) == BF_OPCODE)) { 1507 offsetBits -= 8; 1508 instructionPtr++; 1509 ASSERT((instructionPtr[0] & 0xf000) == MOVL_READ_OFFPC_OPCODE); 1510 changePCrelativeAddress((*instructionPtr & 0xff), instructionPtr, offsetBits); 1511 instruction = (BRAF_OPCODE | (*instructionPtr++ & 0xf00)); 1512 *instructionPtr = instruction; 1513 printBlockInstr(instructionPtr, reinterpret_cast<uint32_t>(from) + 1, 3); 1514 cacheFlush(instructionPtr, sizeof(SH4Word)); 1515 return; 1516 } 1517 1483 instructionPtr -= 3; 1484 ASSERT((instructionPtr[0] & 0xf000) == MOVL_READ_OFFPC_OPCODE); 1518 1485 ASSERT((instructionPtr[1] & 0xf0ff) == BRAF_OPCODE); 1519 changePCrelativeAddress((*instructionPtr & 0xff), instructionPtr, offsetBits - 6); 1520 printInstr(*instructionPtr, reinterpret_cast<uint32_t>(from)); 1486 changePCrelativeAddress((*instructionPtr & 0xff), instructionPtr, reinterpret_cast<uint32_t>(to) - reinterpret_cast<uint32_t>(from)); 1521 1487 } 1522 1488 … … 1570 1536 ASSERT(from.isSet()); 1571 1537 1572 uint16_t* instructionPtr = getInstructionPtr(data(), from.m_offset); 1573 uint16_t instruction = *instructionPtr; 1574 int offsetBits; 1538 uint16_t* instructionPtr = getInstructionPtr(data(), from.m_offset) - 1; 1539 int offsetBits = (to.m_offset - from.m_offset); 1575 1540 1576 1541 if (type == JumpNear) { 1577 int offset = (codeSize() - from.m_offset) - 4; 1542 uint16_t instruction = instructionPtr[0]; 1543 int offset = (offsetBits - 2); 1578 1544 ASSERT((((instruction == BT_OPCODE) || (instruction == BF_OPCODE)) && (offset >= -256) && (offset <= 254)) 1579 1545 || ((instruction == BRA_OPCODE) && (offset >= -4096) && (offset <= 4094))); … … 1583 1549 } 1584 1550 1585 if (((instruction & 0xff00) == BT_OPCODE) || ((instruction & 0xff00) == BF_OPCODE)) {1586 /* BT label => BF 21587 nop LDR reg1588 nop braf @reg1589 nop nop1590 */1591 offsetBits = (to.m_offset - from.m_offset) - 8;1592 instruction ^= 0x0202;1593 *instructionPtr++ = instruction;1594 if ((*instructionPtr & 0xf000) == MOVIMM_OPCODE) {1595 uint32_t* addr = getLdrImmAddressOnPool(instructionPtr, m_buffer.poolAddress());1596 *addr = offsetBits;1597 } else1598 changePCrelativeAddress((*instructionPtr & 0xff), instructionPtr, offsetBits);1599 instruction = (BRAF_OPCODE | (*instructionPtr++ & 0xf00));1600 *instructionPtr = instruction;1601 printBlockInstr(instructionPtr - 2, from.m_offset, 3);1602 return;1603 }1604 1605 1551 /* MOV # imm, reg => LDR reg 1606 1552 braf @reg braf @reg 1607 1553 nop nop 1608 1554 */ 1609 ASSERT((*(instructionPtr + 1) & BRAF_OPCODE) == BRAF_OPCODE); 1610 offsetBits = (to.m_offset - from.m_offset) - 6; 1611 1612 instruction = *instructionPtr; 1613 if ((instruction & 0xf000) == MOVIMM_OPCODE) { 1555 instructionPtr -= 2; 1556 ASSERT((instructionPtr[1] & 0xf0ff) == BRAF_OPCODE); 1557 1558 if ((instructionPtr[0] & 0xf000) == MOVIMM_OPCODE) { 1614 1559 uint32_t* addr = getLdrImmAddressOnPool(instructionPtr, m_buffer.poolAddress()); 1615 1560 *addr = offsetBits;
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