Changeset 84796 in webkit


Ignore:
Timestamp:
Apr 25, 2011 1:19:11 PM (13 years ago)
Author:
commit-queue@webkit.org
Message:

2011-04-25 Thouraya ANDOLSI <​thouraya.andolsi@st.com>

Reviewed by Gavin Barraclough.

Rationalize MacroAssembler branch methods
​https://bugs.webkit.org/show_bug.cgi?id=58950

split out the 'Condition' enum into 'RelationalCondition' and 'ResultCondition'
and apply related changes (only for SH4 platforms).

  • assembler/MacroAssemblerSH4.cpp:
  • assembler/MacroAssemblerSH4.h: (JSC::MacroAssemblerSH4::compare32): (JSC::MacroAssemblerSH4::branch32WithUnalignedHalfWords): (JSC::MacroAssemblerSH4::branchDouble): (JSC::MacroAssemblerSH4::branch32): (JSC::MacroAssemblerSH4::branchTest8): (JSC::MacroAssemblerSH4::branch8): (JSC::MacroAssemblerSH4::branchTruncateDoubleToInt32): (JSC::MacroAssemblerSH4::test8): (JSC::MacroAssemblerSH4::branch16): (JSC::MacroAssemblerSH4::branchTest32): (JSC::MacroAssemblerSH4::branchAdd32): (JSC::MacroAssemblerSH4::branchMul32): (JSC::MacroAssemblerSH4::branchSub32): (JSC::MacroAssemblerSH4::branchOr32): (JSC::MacroAssemblerSH4::branchConvertDoubleToInt32): (JSC::MacroAssemblerSH4::branchPtrWithPatch): (JSC::MacroAssemblerSH4::SH4Condition):
  • assembler/SH4Assembler.h: (JSC::SH4Assembler::cmpEqImmR0):
Location:
trunk/Source/JavaScriptCore
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • trunk/Source/JavaScriptCore/ChangeLog

    r84795 r84796  
     12011-04-25  Thouraya ANDOLSI  <thouraya.andolsi@st.com>
     2
     3        Reviewed by Gavin Barraclough.
     4
     5        Rationalize MacroAssembler branch methods
     6        https://bugs.webkit.org/show_bug.cgi?id=58950
     7
     8        split out the 'Condition' enum into 'RelationalCondition' and 'ResultCondition'
     9        and apply related changes (only for SH4 platforms).
     10
     11        * assembler/MacroAssemblerSH4.cpp:
     12        * assembler/MacroAssemblerSH4.h:
     13        (JSC::MacroAssemblerSH4::compare32):
     14        (JSC::MacroAssemblerSH4::branch32WithUnalignedHalfWords):
     15        (JSC::MacroAssemblerSH4::branchDouble):
     16        (JSC::MacroAssemblerSH4::branch32):
     17        (JSC::MacroAssemblerSH4::branchTest8):
     18        (JSC::MacroAssemblerSH4::branch8):
     19        (JSC::MacroAssemblerSH4::branchTruncateDoubleToInt32):
     20        (JSC::MacroAssemblerSH4::test8):
     21        (JSC::MacroAssemblerSH4::branch16):
     22        (JSC::MacroAssemblerSH4::branchTest32):
     23        (JSC::MacroAssemblerSH4::branchAdd32):
     24        (JSC::MacroAssemblerSH4::branchMul32):
     25        (JSC::MacroAssemblerSH4::branchSub32):
     26        (JSC::MacroAssemblerSH4::branchOr32):
     27        (JSC::MacroAssemblerSH4::branchConvertDoubleToInt32):
     28        (JSC::MacroAssemblerSH4::branchPtrWithPatch):
     29        (JSC::MacroAssemblerSH4::SH4Condition):
     30        * assembler/SH4Assembler.h:
     31        (JSC::SH4Assembler::cmpEqImmR0):
     32
    1332011-04-25  Adam Barth  <abarth@webkit.org>
    234

  • trunk/Source/JavaScriptCore/assembler/MacroAssemblerSH4.cpp

    r82617 r84796  
    3232
    3333namespace JSC {
    34 const Condition MacroAssemblerSH4::Equal = SH4Assembler::EQ;
    35 const Condition MacroAssemblerSH4::NotEqual = SH4Assembler::NE;
    36 const Condition MacroAssemblerSH4::GreaterThan = SH4Assembler::GT;
    37 const Condition MacroAssemblerSH4::GreaterThanOrEqual = SH4Assembler::GE;
    38 const Condition MacroAssemblerSH4::LessThan = SH4Assembler::LT;
    39 const Condition MacroAssemblerSH4::LessThanOrEqual = SH4Assembler::LE;
    40 const Condition MacroAssemblerSH4::UGreaterThan = SH4Assembler::HI;
    41 const Condition MacroAssemblerSH4::UGreaterThanOrEqual = SH4Assembler::HS;
    42 const Condition MacroAssemblerSH4::ULessThan = SH4Assembler::LI;
    43 const Condition MacroAssemblerSH4::ULessThanOrEqual = SH4Assembler::LS;
    44 const Condition MacroAssemblerSH4::Zero = SH4Assembler::EQ;
    45 const Condition MacroAssemblerSH4::NonZero = SH4Assembler::NE;
    46 const Condition MacroAssemblerSH4::Overflow = SH4Assembler::OF;
    47 const Condition MacroAssemblerSH4::Above = SH4Assembler::HI;
    48 const Condition MacroAssemblerSH4::AboveOrEqual = SH4Assembler::HS;
    49 const Condition MacroAssemblerSH4::Below = SH4Assembler::LI;
    50 const Condition MacroAssemblerSH4::BelowOrEqual = SH4Assembler::LS;
    51 const Condition MacroAssemblerSH4::DoubleEqual = SH4Assembler::EQ;
    52 const Condition MacroAssemblerSH4::DoubleNotEqual = SH4Assembler::NE;
    53 const Condition MacroAssemblerSH4::DoubleGreaterThan = SH4Assembler::GT;
    54 const Condition MacroAssemblerSH4::DoubleGreaterThanOrEqual = SH4Assembler::GE;
    55 const Condition MacroAssemblerSH4::DoubleLessThan = SH4Assembler::LT;
    56 const Condition MacroAssemblerSH4::DoubleLessThanOrEqual = SH4Assembler::LE;
    57 const Condition MacroAssemblerSH4::DoubleEqualOrUnordered = SH4Assembler::EQU;
    58 const Condition MacroAssemblerSH4::DoubleNotEqualOrUnordered = SH4Assembler::NEU;
    59 const Condition MacroAssemblerSH4::DoubleGreaterThanOrUnordered = SH4Assembler::GTU;
    60 const Condition MacroAssemblerSH4::DoubleGreaterThanOrEqualOrUnordered = SH4Assembler::GEU;
    61 const Condition MacroAssemblerSH4::DoubleLessThanOrUnordered = SH4Assembler::LTU;
    62 const Condition MacroAssemblerSH4::DoubleLessThanOrEqualOrUnordered = SH4Assembler::LEU;
    63 const Condition MacroAssemblerSH4::Signed = SH4Assembler::SI;
    6434
    6535void MacroAssemblerSH4::linkCall(void* code, Call call, FunctionPtr function)

  • trunk/Source/JavaScriptCore/assembler/MacroAssemblerSH4.h

    r83447 r84796  
    3535
    3636namespace JSC {
    37 typedef SH4Assembler::Condition Condition;
    3837
    3938class MacroAssemblerSH4 : public AbstractMacroAssembler<SH4Assembler> {
    … …  
    4140    typedef SH4Assembler::FPRegisterID FPRegisterID;
    4241
    43     static const Condition Equal;
    44     static const Condition NotEqual;
    45     static const Condition GreaterThan;
    46     static const Condition GreaterThanOrEqual;
    47     static const Condition LessThan;
    48     static const Condition LessThanOrEqual;
    49     static const Condition UGreaterThan;
    50     static const Condition UGreaterThanOrEqual;
    51     static const Condition ULessThan;
    52     static const Condition ULessThanOrEqual;
    53     static const Condition Zero;
    54     static const Condition NonZero;
    55     static const Condition Overflow;
    56     static const Condition Above;
    57     static const Condition AboveOrEqual;
    58     static const Condition Below;
    59     static const Condition BelowOrEqual;
    60     static const Condition DoubleEqual;
    61     static const Condition DoubleNotEqual;
    62     static const Condition DoubleGreaterThan;
    63     static const Condition DoubleGreaterThanOrEqual;
    64     static const Condition DoubleLessThan;
    65     static const Condition DoubleLessThanOrEqual;
    66     static const Condition DoubleEqualOrUnordered;
    67     static const Condition DoubleNotEqualOrUnordered;
    68     static const Condition DoubleGreaterThanOrUnordered;
    69     static const Condition DoubleGreaterThanOrEqualOrUnordered;
    70     static const Condition DoubleLessThanOrUnordered;
    71     static const Condition DoubleLessThanOrEqualOrUnordered;
    72     static const Condition Signed;
    7342    static const Scale ScalePtr = TimesFour;
    7443    static const FPRegisterID fscratch = SH4Registers::fr10;
    … …  
    7746    static const RegisterID scratchReg3 = SH4Registers::r13;
    7847
     48    enum RelationalCondition {
     49        Equal = SH4Assembler::EQ,
     50        NotEqual = SH4Assembler::NE,
     51        Above = SH4Assembler::HI,
     52        AboveOrEqual = SH4Assembler::HS,
     53        Below = SH4Assembler::LI,
     54        BelowOrEqual = SH4Assembler::LS,
     55        GreaterThan = SH4Assembler::GT,
     56        GreaterThanOrEqual = SH4Assembler::GE,
     57        LessThan = SH4Assembler::LT,
     58        LessThanOrEqual = SH4Assembler::LE
     59    };
     60
     61    enum ResultCondition {
     62        Overflow = SH4Assembler::OF,
     63        Signed = SH4Assembler::SI,
     64        Zero = SH4Assembler::EQ,
     65        NonZero = SH4Assembler::NE
     66    };
     67
     68    enum DoubleCondition {
     69        // These conditions will only evaluate to true if the comparison is ordered - i.e. neither operand is NaN.
     70        DoubleEqual = SH4Assembler::EQ,
     71        DoubleNotEqual = SH4Assembler::NE,
     72        DoubleGreaterThan = SH4Assembler::GT,
     73        DoubleGreaterThanOrEqual = SH4Assembler::GE,
     74        DoubleLessThan = SH4Assembler::LT,
     75        DoubleLessThanOrEqual = SH4Assembler::LE,
     76        // If either operand is NaN, these conditions always evaluate to true.
     77        DoubleEqualOrUnordered = SH4Assembler::EQU,
     78        DoubleNotEqualOrUnordered = SH4Assembler::NEU,
     79        DoubleGreaterThanOrUnordered = SH4Assembler::GTU,
     80        DoubleGreaterThanOrEqualOrUnordered = SH4Assembler::GEU,
     81        DoubleLessThanOrUnordered = SH4Assembler::LTU,
     82        DoubleLessThanOrEqualOrUnordered = SH4Assembler::LEU,
     83    };
     84
    7985    RegisterID claimScratch()
    8086    {
    … …  
    349355    }
    350356
    351     void compare32(int imm, RegisterID dst, Condition cond)
     357    void compare32(int imm, RegisterID dst, RelationalCondition cond)
    352358    {
    353359        if (((cond == Equal) || (cond == NotEqual)) && (dst == SH4Registers::r0) && m_assembler.isImmediate(imm)) {
    354             m_assembler.cmpEqImmR0(imm, dst, cond);
     360            m_assembler.cmpEqImmR0(imm, dst);
    355361            return;
    356362        }
    … …  
    358364        RegisterID scr = claimScratch();
    359365        m_assembler.loadConstant(imm, scr);
    360         m_assembler.cmplRegReg(scr, dst, cond);
    361         releaseScratch(scr);
    362     }
    363 
    364     void compare32(int offset, RegisterID base, RegisterID left, Condition cond)
     366        m_assembler.cmplRegReg(scr, dst, SH4Condition(cond));
     367        releaseScratch(scr);
     368    }
     369
     370    void compare32(int offset, RegisterID base, RegisterID left, RelationalCondition cond)
    365371    {
    366372        RegisterID scr = claimScratch();
    367373        if (!offset) {
    368374            m_assembler.movlMemReg(base, scr);
    369             m_assembler.cmplRegReg(scr, left, cond);
     375            m_assembler.cmplRegReg(scr, left, SH4Condition(cond));
    370376            releaseScratch(scr);
    371377            return;
    … …  
    376382            m_assembler.addlRegReg(base, scr);
    377383            m_assembler.movlMemReg(scr, scr);
    378             m_assembler.cmplRegReg(scr, left, cond);
     384            m_assembler.cmplRegReg(scr, left, SH4Condition(cond));
    379385            releaseScratch(scr);
    380386            return;
    … …  
    382388
    383389        m_assembler.movlMemReg(offset >> 2, base, scr);
    384         m_assembler.cmplRegReg(scr, left, cond);
     390        m_assembler.cmplRegReg(scr, left, SH4Condition(cond));
    385391        releaseScratch(scr);
    386392    }
    … …  
    422428    }
    423429
    424     void compare32(RegisterID right, int offset, RegisterID base, Condition cond)
     430    void compare32(RegisterID right, int offset, RegisterID base, RelationalCondition cond)
    425431    {
    426432        if (!offset) {
    427433            RegisterID scr = claimScratch();
    428434            m_assembler.movlMemReg(base, scr);
    429             m_assembler.cmplRegReg(right, scr, cond);
     435            m_assembler.cmplRegReg(right, scr, SH4Condition(cond));
    430436            releaseScratch(scr);
    431437            return;
    … …  
    437443            m_assembler.addlRegReg(base, scr);
    438444            m_assembler.movlMemReg(scr, scr);
    439             m_assembler.cmplRegReg(right, scr, cond);
     445            m_assembler.cmplRegReg(right, scr, SH4Condition(cond));
    440446            releaseScratch(scr);
    441447            return;
    … …  
    444450        RegisterID scr = claimScratch();
    445451        m_assembler.movlMemReg(offset >> 2, base, scr);
    446         m_assembler.cmplRegReg(right, scr, cond);
    447         releaseScratch(scr);
    448     }
    449 
    450     void compare32(int imm, int offset, RegisterID base, Condition cond)
     452        m_assembler.cmplRegReg(right, scr, SH4Condition(cond));
     453        releaseScratch(scr);
     454    }
     455
     456    void compare32(int imm, int offset, RegisterID base, RelationalCondition cond)
    451457    {
    452458        if (!offset) {
    … …  
    455461            m_assembler.movlMemReg(base, scr);
    456462            m_assembler.loadConstant(imm, scr1);
    457             m_assembler.cmplRegReg(scr1, scr, cond);
     463            m_assembler.cmplRegReg(scr1, scr, SH4Condition(cond));
    458464            releaseScratch(scr1);
    459465            releaseScratch(scr);
    … …  
    468474            m_assembler.movlMemReg(scr, scr);
    469475            m_assembler.loadConstant(imm, scr1);
    470             m_assembler.cmplRegReg(scr1, scr, cond);
     476            m_assembler.cmplRegReg(scr1, scr, SH4Condition(cond));
    471477            releaseScratch(scr1);
    472478            releaseScratch(scr);
    … …  
    478484        m_assembler.movlMemReg(offset >> 2, base, scr);
    479485        m_assembler.loadConstant(imm, scr1);
    480         m_assembler.cmplRegReg(scr1, scr, cond);
     486        m_assembler.cmplRegReg(scr1, scr, SH4Condition(cond));
    481487        releaseScratch(scr1);
    482488        releaseScratch(scr);
    … …  
    867873    }
    868874
    869     Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right)
     875    Jump branch32WithUnalignedHalfWords(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
    870876    {
    871877        RegisterID scr = scratchReg3;
    … …  
    895901    }
    896902
    897     Jump branchDouble(Condition cond, FPRegisterID left, FPRegisterID right)
     903    Jump branchDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right)
    898904    {
    899905        if (cond == DoubleEqual) {
    … …  
    907913            m_assembler.dcnvds(right);
    908914            m_assembler.stsfpulReg(scr);
    909             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     915            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    910916            m_assembler.ensureSpace(m_assembler.maxInstructionSize + 22, sizeof(uint32_t));
    911917            m_assembler.branch(BT_OPCODE, 8);
    912918            m_assembler.dcnvds(left);
    913919            m_assembler.stsfpulReg(scr);
    914             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     920            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    915921            m_assembler.branch(BT_OPCODE, 4);
    916922            m_assembler.dcmppeq(right, left);
    … …  
    944950            m_assembler.dcnvds(right);
    945951            m_assembler.stsfpulReg(scr);
    946             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     952            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    947953            m_assembler.ensureSpace(m_assembler.maxInstructionSize + 22, sizeof(uint32_t));
    948954            m_assembler.branch(BT_OPCODE, 5);
    949955            m_assembler.dcnvds(left);
    950956            m_assembler.stsfpulReg(scr);
    951             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     957            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    952958            m_assembler.branch(BT_OPCODE, 1);
    953959            m_assembler.dcmppeq(left, right);
    … …  
    961967            m_assembler.dcnvds(right);
    962968            m_assembler.stsfpulReg(scr);
    963             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     969            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    964970            m_assembler.ensureSpace(m_assembler.maxInstructionSize + 22, sizeof(uint32_t));
    965971            m_assembler.branch(BT_OPCODE, 5);
    966972            m_assembler.dcnvds(left);
    967973            m_assembler.stsfpulReg(scr);
    968             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     974            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    969975            m_assembler.branch(BT_OPCODE, 1);
    970976            m_assembler.dcmppgt(right, left);
    … …  
    978984            m_assembler.dcnvds(right);
    979985            m_assembler.stsfpulReg(scr);
    980             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     986            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    981987            m_assembler.ensureSpace(m_assembler.maxInstructionSize + 22, sizeof(uint32_t));
    982988            m_assembler.branch(BT_OPCODE, 5);
    983989            m_assembler.dcnvds(left);
    984990            m_assembler.stsfpulReg(scr);
    985             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     991            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    986992            m_assembler.branch(BT_OPCODE, 1);
    987993            m_assembler.dcmppgt(left, right);
    … …  
    9951001            m_assembler.dcnvds(right);
    9961002            m_assembler.stsfpulReg(scr);
    997             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     1003            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    9981004            m_assembler.ensureSpace(m_assembler.maxInstructionSize + 22, sizeof(uint32_t));
    9991005            m_assembler.branch(BT_OPCODE, 5);
    10001006            m_assembler.dcnvds(left);
    10011007            m_assembler.stsfpulReg(scr);
    1002             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     1008            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    10031009            m_assembler.branch(BT_OPCODE, 1);
    10041010            m_assembler.dcmppgt(left, right);
    … …  
    10121018            m_assembler.dcnvds(right);
    10131019            m_assembler.stsfpulReg(scr);
    1014             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     1020            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    10151021            m_assembler.ensureSpace(m_assembler.maxInstructionSize + 22, sizeof(uint32_t));
    10161022            m_assembler.branch(BT_OPCODE, 5);
    10171023            m_assembler.dcnvds(left);
    10181024            m_assembler.stsfpulReg(scr);
    1019             m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     1025            m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    10201026            m_assembler.branch(BT_OPCODE, 1);
    10211027            m_assembler.dcmppgt(right, left);
    … …  
    10291035        m_assembler.dcnvds(right);
    10301036        m_assembler.stsfpulReg(scr);
    1031         m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     1037        m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    10321038        m_assembler.ensureSpace(m_assembler.maxInstructionSize + 22, sizeof(uint32_t));
    10331039        m_assembler.branch(BT_OPCODE, 5);
    10341040        m_assembler.dcnvds(left);
    10351041        m_assembler.stsfpulReg(scr);
    1036         m_assembler.cmplRegReg(scratchReg3, scr, Equal);
     1042        m_assembler.cmplRegReg(scratchReg3, scr, SH4Condition(Equal));
    10371043        m_assembler.branch(BT_OPCODE, 1);
    10381044        m_assembler.dcmppeq(right, left);
    … …  
    10611067    }
    10621068
    1063     void set8Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
    1064     {
    1065         set32Compare32(cond, left, right, dest);
    1066     }
    1067 
    1068     void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
    1069     {
    1070         if (left != dest) {
    1071             m_assembler.loadConstant(right.m_value, dest);
    1072             set32Compare32(cond, left, dest, dest);
    1073             return;
    1074         }
    1075 
    1076         RegisterID scr = claimScratch();
    1077         m_assembler.loadConstant(right.m_value, scr);
    1078         set32Compare32(cond, left, scr, dest);
    1079         releaseScratch(scr);
    1080     }
    1081 
    1082     Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right)
     1069    Jump branch32(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
    10831070    {
    10841071        RegisterID scr = claimScratch();
    … …  
    11021089    }
    11031090
    1104     Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
     1091    Jump branchTest8(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
    11051092    {
    11061093        RegisterID addressTempRegister = claimScratch();
    … …  
    11171104    }
    11181105
    1119     Jump branch8(Condition cond, Address left, TrustedImm32 right)
     1106    Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
    11201107    {
    11211108        RegisterID addressTempRegister = claimScratch();
    … …  
    11311118        m_assembler.stsfpulReg(dest);
    11321119        m_assembler.loadConstant(0x7fffffff, scratchReg3);
    1133         m_assembler.cmplRegReg(dest, scratchReg3, Equal);
     1120        m_assembler.cmplRegReg(dest, scratchReg3, SH4Condition(Equal));
    11341121        m_assembler.ensureSpace(m_assembler.maxInstructionSize + 14, sizeof(uint32_t));
    11351122        m_assembler.branch(BT_OPCODE, 2);
    11361123        m_assembler.addlImm8r(1, scratchReg3);
    1137         m_assembler.cmplRegReg(dest, scratchReg3, Equal);
     1124        m_assembler.cmplRegReg(dest, scratchReg3, SH4Condition(Equal));
    11381125        return branchTrue();
    11391126    }
    … …  
    12091196    }
    12101197
    1211     void set32Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
    1212     {
    1213         m_assembler.cmplRegReg(right, left, cond);
     1198    void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
     1199    {
     1200        m_assembler.cmplRegReg(right, left, SH4Condition(cond));
    12141201        if (cond != NotEqual) {
    12151202            m_assembler.movt(dest);
    … …  
    12231210    }
    12241211
    1225     void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
     1212    void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
    12261213    {
    12271214        if (left != dest) {
    12281215            move(right, dest);
    1229             set32Compare32(cond, left, dest, dest);
     1216            compare32(cond, left, dest, dest);
    12301217            return;
    12311218        }
    … …  
    12331220        RegisterID scr = claimScratch();
    12341221        move(right, scr);
    1235         set32Compare32(cond, left, scr, dest);
    1236         releaseScratch(scr);
    1237     }
    1238 
    1239     void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
     1222        compare32(cond, left, scr, dest);
     1223        releaseScratch(scr);
     1224    }
     1225
     1226    void test8(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
    12401227    {
    12411228        ASSERT((cond == Zero) || (cond == NonZero));
    … …  
    12431230        load8(address, dest);
    12441231        if (mask.m_value == -1)
    1245             compare32(0, dest, cond);
     1232            compare32(0, dest, static_cast<RelationalCondition>(cond));
    12461233        else
    12471234            testlImm(mask.m_value, dest);
    … …  
    12651252    }
    12661253
    1267     Jump branch32(Condition cond, RegisterID left, RegisterID right)
    1268     {
    1269         m_assembler.cmplRegReg(right, left, cond);
     1254    Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
     1255    {
     1256        m_assembler.cmplRegReg(right, left, SH4Condition(cond));
    12701257        /* BT label => BF off
    12711258           nop         LDR reg
    … …  
    12781265    }
    12791266
    1280     Jump branch32(Condition cond, RegisterID left, TrustedImm32 right)
     1267    Jump branch32(RelationalCondition cond, RegisterID left, TrustedImm32 right)
    12811268    {
    12821269        if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
    … …  
    12901277    }
    12911278
    1292     Jump branch32(Condition cond, RegisterID left, Address right)
     1279    Jump branch32(RelationalCondition cond, RegisterID left, Address right)
    12931280    {
    12941281        compare32(right.offset, right.base, left, cond);
    … …  
    12981285    }
    12991286
    1300     Jump branch32(Condition cond, Address left, RegisterID right)
     1287    Jump branch32(RelationalCondition cond, Address left, RegisterID right)
    13011288    {
    13021289        compare32(right, left.offset, left.base, cond);
    … …  
    13061293    }
    13071294
    1308     Jump branch32(Condition cond, Address left, TrustedImm32 right)
     1295    Jump branch32(RelationalCondition cond, Address left, TrustedImm32 right)
    13091296    {
    13101297        compare32(right.m_value, left.offset, left.base, cond);
    … …  
    13141301    }
    13151302
    1316     Jump branch32(Condition cond, AbsoluteAddress left, RegisterID right)
     1303    Jump branch32(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
    13171304    {
    13181305        RegisterID scr = claimScratch();
    13191306
    13201307        move(TrustedImm32(reinterpret_cast<uint32_t>(left.m_ptr)), scr);
    1321         m_assembler.cmplRegReg(right, scr, cond);
    1322         releaseScratch(scr);
    1323 
    1324         if (cond == NotEqual)
    1325             return branchFalse();
    1326         return branchTrue();
    1327     }
    1328 
    1329     Jump branch32(Condition cond, AbsoluteAddress left, TrustedImm32 right)
     1308        m_assembler.cmplRegReg(right, scr, SH4Condition(cond));
     1309        releaseScratch(scr);
     1310
     1311        if (cond == NotEqual)
     1312            return branchFalse();
     1313        return branchTrue();
     1314    }
     1315
     1316    Jump branch32(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
    13301317    {
    13311318        RegisterID addressTempRegister = claimScratch();
    … …  
    13411328    }
    13421329
    1343     Jump branch16(Condition cond,  BaseIndex left, RegisterID right)
     1330    Jump branch16(RelationalCondition cond,  BaseIndex left, RegisterID right)
    13441331    {
    13451332        RegisterID scr = claimScratch();
    … …  
    13581345    }
    13591346
    1360     Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right)
     1347    Jump branch16(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
    13611348    {
    13621349        RegisterID scr = claimScratch();
    … …  
    13781365    }
    13791366
    1380     Jump branchTest32(Condition cond, RegisterID reg, RegisterID mask)
     1367    Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
    13811368    {
    13821369        ASSERT((cond == Zero) || (cond == NonZero));
    … …  
    13891376    }
    13901377
    1391     Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
     1378    Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
    13921379    {
    13931380        ASSERT((cond == Zero) || (cond == NonZero));
    … …  
    14031390    }
    14041391
    1405     Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
     1392    Jump branchTest32(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
    14061393    {
    14071394        ASSERT((cond == Zero) || (cond == NonZero));
    14081395
    14091396        if (mask.m_value == -1)
    1410             compare32(0, address.offset, address.base, cond);
     1397            compare32(0, address.offset, address.base, static_cast<RelationalCondition>(cond));
    14111398        else
    14121399            testImm(mask.m_value, address.offset, address.base);
    … …  
    14171404    }
    14181405
    1419     Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
     1406    Jump branchTest32(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
    14201407    {
    14211408        RegisterID scr = claimScratch();
    … …  
    14671454    // Arithmetic control flow operations
    14681455
    1469     Jump branchAdd32(Condition cond, RegisterID src, RegisterID dest)
     1456    Jump branchAdd32(ResultCondition cond, RegisterID src, RegisterID dest)
    14701457    {
    14711458        ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
    … …  
    14911478    }
    14921479
    1493     Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest)
     1480    Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
    14941481    {
    14951482        ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
    … …  
    14991486    }
    15001487
    1501     Jump branchMul32(Condition cond, RegisterID src, RegisterID dest)
     1488    Jump branchMul32(ResultCondition cond, RegisterID src, RegisterID dest)
    15021489    {
    15031490        ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
    … …  
    15121499            m_assembler.shaRegReg(scr1, scr);
    15131500            m_assembler.stsmach(scr);
    1514             m_assembler.cmplRegReg(scr, scr1, Zero);
     1501            m_assembler.cmplRegReg(scr, scr1, SH4Condition(Equal));
    15151502            releaseScratch(scr1);
    15161503            releaseScratch(scr);
    … …  
    15261513        }
    15271514
    1528         compare32(0, dest, cond);
    1529 
    1530         if (cond == NotEqual)
    1531             return branchFalse();
    1532         return branchTrue();
    1533     }
    1534 
    1535     Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
     1515        compare32(0, dest, static_cast<RelationalCondition>(cond));
     1516
     1517        if (cond == NotEqual)
     1518            return branchFalse();
     1519        return branchTrue();
     1520    }
     1521
     1522    Jump branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
    15361523    {
    15371524        ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
    … …  
    15441531    }
    15451532
    1546     Jump branchSub32(Condition cond, RegisterID src, RegisterID dest)
     1533    Jump branchSub32(ResultCondition cond, RegisterID src, RegisterID dest)
    15471534    {
    15481535        ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
    … …  
    15611548
    15621549        sub32(src, dest);
    1563         compare32(0, dest, cond);
    1564 
    1565         if (cond == NotEqual)
    1566             return branchFalse();
    1567         return branchTrue();
    1568     }
    1569 
    1570     Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest)
     1550        compare32(0, dest, static_cast<RelationalCondition>(cond));
     1551
     1552        if (cond == NotEqual)
     1553            return branchFalse();
     1554        return branchTrue();
     1555    }
     1556
     1557    Jump branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
    15711558    {
    15721559        ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
    … …  
    15761563    }
    15771564
    1578     Jump branchOr32(Condition cond, RegisterID src, RegisterID dest)
     1565    Jump branchOr32(ResultCondition cond, RegisterID src, RegisterID dest)
    15791566    {
    15801567        ASSERT((cond == Signed) || (cond == Zero) || (cond == NonZero));
    … …  
    15821569        if (cond == Signed) {
    15831570            or32(src, dest);
    1584             compare32(0, dest, LessThan);
     1571            compare32(0, dest, static_cast<RelationalCondition>(LessThan));
    15851572            return branchTrue();
    15861573        }
    15871574
    15881575        or32(src, dest);
    1589         compare32(0, dest, cond);
     1576        compare32(0, dest, static_cast<RelationalCondition>(cond));
    15901577
    15911578        if (cond == NotEqual)
    … …  
    16021589
    16031590        if (dest == SH4Registers::r0)
    1604             m_assembler.cmpEqImmR0(0, dest, Equal);
     1591            m_assembler.cmpEqImmR0(0, dest);
    16051592        else {
    16061593            m_assembler.movImm8(0, scratchReg3);
    1607             m_assembler.cmplRegReg(scratchReg3, dest, Equal);
     1594            m_assembler.cmplRegReg(scratchReg3, dest, SH4Condition(Equal));
    16081595        }
    16091596        failureCases.append(branchTrue());
    … …  
    16661653    }
    16671654
    1668     Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
     1655    Jump branchPtrWithPatch(RelationalCondition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
    16691656    {
    16701657        RegisterID dataTempRegister = claimScratch();
    16711658
    16721659        dataLabel = moveWithPatch(initialRightValue, dataTempRegister);
    1673         m_assembler.cmplRegReg(dataTempRegister, left, cond);
     1660        m_assembler.cmplRegReg(dataTempRegister, left, SH4Condition(cond));
    16741661        releaseScratch(dataTempRegister);
    16751662
    … …  
    16791666    }
    16801667
    1681     Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
     1668    Jump branchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
    16821669    {
    16831670        RegisterID scr = claimScratch();
    … …  
    16881675        RegisterID scr1 = claimScratch();
    16891676        dataLabel = moveWithPatch(initialRightValue, scr1);
    1690         m_assembler.cmplRegReg(scr1, scr, cond);
     1677        m_assembler.cmplRegReg(scr1, scr, SH4Condition(cond));
    16911678        releaseScratch(scr);
    16921679        releaseScratch(scr1);
    … …  
    17351722        return tailRecursiveCall();
    17361723    }
    1737 
     1724protected:
     1725    SH4Assembler::Condition SH4Condition(RelationalCondition cond)
     1726    {
     1727        return static_cast<SH4Assembler::Condition>(cond);
     1728    }
     1729
     1730    SH4Assembler::Condition SH4Condition(ResultCondition cond)
     1731    {
     1732        return static_cast<SH4Assembler::Condition>(cond);
     1733    }
    17381734private:
    17391735    friend class LinkBuffer;

  • trunk/Source/JavaScriptCore/assembler/SH4Assembler.h

    r82617 r84796  
    703703    }
    704704
    705     void cmpEqImmR0(int imm, RegisterID dst, Condition cond)
     705    void cmpEqImmR0(int imm, RegisterID dst)
    706706    {
    707707        uint16_t opc = getOpcodeGroup5(CMPEQIMM_OPCODE, imm);
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