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Timeline



Dec 25, 2020:

9:39 PM Changeset in webkit [271086] by aestes@apple.com
  • 2 edits in trunk/Source/WebCore

REGRESSION (r270662): SourceBufferParserWebM leaks CMSampleBufferRefs
​https://bugs.webkit.org/show_bug.cgi?id=220144

Reviewed by Anders Carlsson.

  • platform/graphics/cocoa/SourceBufferParserWebM.cpp:

(WebCore::SourceBufferParserWebM::VideoTrackData::createSampleBuffer):
(WebCore::SourceBufferParserWebM::AudioTrackData::createSampleBuffer): Move the RetainPtr
holding an adopted CMSampleBufferRef rather than leaking it when calling provideMediaData.

1:46 PM Changeset in webkit [271085] by Alan Bujtas
  • 8 edits in trunk/Source/WebCore

[LFC][Integration] Use the pre-computed geometries for the inline level boxes
​https://bugs.webkit.org/show_bug.cgi?id=220135
<rdar://problem/72642850>

Reviewed by Antti Koivisto.

Let's skip the tree traversal and recomputing the box geometries in InlineFormattingContext::layoutInFlowContent.

  • layout/FormattingContextGeometry.cpp:

(WebCore::Layout::FormattingContext::Geometry::inlineReplacedContentHeightAndMargin const):
(WebCore::Layout::FormattingContext::Geometry::inlineReplacedContentWidthAndMargin):

  • layout/inlineformatting/InlineFormattingContext.h:
  • layout/integration/LayoutIntegrationLineLayout.cpp:

(WebCore::LayoutIntegration::LineLayout::updateLayoutBoxDimensions):
(WebCore::LayoutIntegration::LineLayout::updateLineBreakBoxDimensions):
(WebCore::LayoutIntegration::LineLayout::layout):

  • layout/integration/LayoutIntegrationLineLayout.h:
  • layout/layouttree/LayoutReplacedBox.h:

(WebCore::Layout::ReplacedBox::contentSizeForIntegration const): Deleted.
(WebCore::Layout::ReplacedBox::setContentSizeForIntegration): Deleted.

  • rendering/RenderBlockFlow.cpp:

(WebCore::RenderBlockFlow::layoutModernLines):

9:53 AM Changeset in webkit [271084] by Alan Bujtas
  • 2 edits in trunk/Source/WebCore

[LFC][IFC] Fast vertical alignment should work with line-height
​https://bugs.webkit.org/show_bug.cgi?id=220131

Reviewed by Antti Koivisto.

Adjust the line box height and the root inline box's logical top position as the layout bounds of the inline-block content stretches the line.

  • layout/inlineformatting/InlineFormattingContextGeometry.cpp:

(WebCore::Layout::LineBoxBuilder::LineBoxBuilder):
(WebCore::Layout::LineBoxBuilder::constructInlineLevelBoxes):

2:35 AM Changeset in webkit [271083] by ysuzuki@apple.com
  • 74 edits
    1 copy
    5 adds
    1 delete in trunk/Source/ThirdParty

Update capstone
​https://bugs.webkit.org/show_bug.cgi?id=219941

Reviewed by Michael Catanzaro.

  • capstone/CMakeLists.txt:
  • capstone/Source/.gitignore:
  • capstone/Source/.travis.yml:
  • capstone/Source/CMakeLists.txt:
  • capstone/Source/COMPILE.TXT:
  • capstone/Source/COMPILE_CMAKE.TXT:
  • capstone/Source/COMPILE_MSVC.TXT:
  • capstone/Source/CREDITS.TXT:
  • capstone/Source/ChangeLog-capstone:
  • capstone/Source/HACK.TXT:
  • capstone/Source/LEB128.h:

(decodeULEB128):

  • capstone/Source/MCDisassembler.h:
  • capstone/Source/MCFixedLenDisassembler.h:
  • capstone/Source/MCInst.c:

(MCInst_Init):
(MCInst_clear):
(MCInst_insert0):
(MCInst_setOpcode):
(MCInst_setOpcodePub):
(MCInst_getOpcode):
(MCInst_getOpcodePub):
(MCInst_getOperand):
(MCInst_getNumOperands):
(MCInst_addOperand2):
(MCOperand_isValid):
(MCOperand_isReg):
(MCOperand_isImm):
(MCOperand_isFPImm):
(MCOperand_getReg):
(MCOperand_setReg):
(MCOperand_getImm):
(MCOperand_setImm):
(MCOperand_getFPImm):
(MCOperand_setFPImm):
(MCOperand_CreateReg1):
(MCOperand_CreateReg0):
(MCOperand_CreateImm1):
(MCOperand_CreateImm0):
(MCOperand_Init): Deleted.

  • capstone/Source/MCInst.h:
  • capstone/Source/MCInstrDesc.c:

(MCOperandInfo_isPredicate):
(MCOperandInfo_isOptionalDef):

  • capstone/Source/MCInstrDesc.h:
  • capstone/Source/MCRegisterInfo.c:

(MCRegisterInfo_InitMCRegisterInfo):
(DiffListIterator_init):
(DiffListIterator_getVal):
(DiffListIterator_next):
(DiffListIterator_isValid):
(MCRegisterInfo_getMatchingSuperReg):
(MCRegisterInfo_getSubReg):
(MCRegisterInfo_getRegClass):
(MCRegisterClass_contains):

  • capstone/Source/MCRegisterInfo.h:
  • capstone/Source/Makefile:
  • capstone/Source/MathExtras.h:

(Hi_32):
(Lo_32):
(isUIntN):
(isMask_32):
(isMask_64):
(isShiftedMask_32):
(isShiftedMask_64):
(isPowerOf2_32):
(CountLeadingZeros_32):
(CountLeadingOnes_32):
(CountLeadingZeros_64):
(CountLeadingOnes_64):
(CountTrailingZeros_32):
(CountTrailingOnes_32):
(CountTrailingZeros_64):
(CountTrailingOnes_64):
(CountPopulation_32):
(CountPopulation_64):
(Log2_32):
(Log2_64):
(Log2_32_Ceil):
(Log2_64_Ceil):
(GreatestCommonDivisor64):
(BitsToDouble):
(BitsToFloat):
(DoubleToBits):
(FloatToBits):
(MinAlign):
(NextPowerOf2):
(RoundUpToAlignment):
(OffsetToAlignment):
(abs64):
(SignExtend32):
(SignExtend64):
(countLeadingZeros):

  • capstone/Source/README.md:
  • capstone/Source/SPONSORS.TXT: Added.
  • capstone/Source/SStream.c:

(SStream_Init):
(SStream_concat0):
(SStream_concat):
(printInt64Bang):
(printUInt64Bang):
(printInt64):
(printInt32BangDec):
(printInt32Bang):
(printInt32):
(printUInt32Bang):
(printUInt32):

  • capstone/Source/SStream.h:
  • capstone/Source/arch/ARM/ARMAddressingModes.h:

(ARM_AM_getAddrOpcStr):
(ARM_AM_getShiftOpcStr):
(ARM_AM_getShiftOpcEncoding):
(ARM_AM_getAMSubModeStr):
(rotr32):
(rotl32):
(getSORegOpc):
(getSORegOffset):
(ARM_AM_getSORegShOp):
(getSOImmValImm):
(getSOImmValRot):
(getSOImmValRotate):
(getSOImmVal):
(isSOImmTwoPartVal):
(getSOImmTwoPartFirst):
(getSOImmTwoPartSecond):
(getThumbImmValShift):
(isThumbImmShiftedVal):
(getThumbImm16ValShift):
(isThumbImm16ShiftedVal):
(getThumbImmNonShiftedVal):
(getT2SOImmValSplatVal):
(getT2SOImmValRotateVal):
(getT2SOImmVal):
(getT2SOImmValRotate):
(isT2SOImmTwoPartVal):
(getT2SOImmTwoPartFirst):
(getT2SOImmTwoPartSecond):
(ARM_AM_getAM2Opc):
(getAM2Offset):
(getAM2Op):
(getAM2ShiftOpc):
(getAM2IdxMode):
(getAM3Opc):
(getAM3Offset):
(getAM3Op):
(getAM3IdxMode):
(getAM4SubMode):
(getAM4ModeImm):
(ARM_AM_getAM5Opc):
(ARM_AM_getAM5Offset):
(ARM_AM_getAM5Op):
(createNEONModImm):
(getNEONModImmOpCmode):
(getNEONModImmVal):
(ARM_AM_decodeNEONModImm):
(getFPImmFloat):

  • capstone/Source/arch/ARM/ARMBaseInfo.h:

(ARMCC_getOppositeCondition):
(ARMCC_ARMCondCodeToString):
(ARM_PROC_IFlagsToString):
(ARM_PROC_IModToString):
(ARM_MB_MemBOptToString):
(ARM_ISB_InstSyncBOptToString):
(isARMLowRegister):
(ARMII_AddrModeToString):

  • capstone/Source/arch/ARM/ARMDisassembler.c:

(ITStatus_push_back):
(ITStatus_instrInITBlock):
(ITStatus_instrLastInITBlock):
(ITStatus_getITCC):
(ITStatus_advanceITState):
(ITStatus_setITState):
(Check):
(ARM_getFeatureBits):
(DecodePredicateOperand):
(ARM_init):
(checkDecodedInstruction):
(_ARM_getInstruction):
(AddThumb1SBit):
(AddThumbPredicate):
(UpdateThumbVFPPredicate):
(_Thumb_getInstruction):
(Thumb_getInstruction):
(ARM_getInstruction):
(DecodeGPRnopcRegisterClass):
(DecodeGPRwithAPSRRegisterClass):
(DecodetGPRRegisterClass):
(DecodetcGPRRegisterClass):
(DecoderGPRRegisterClass):
(DecodeDPRRegisterClass):
(DecodeDPR_8RegisterClass):
(DecodeDPR_VFP2RegisterClass):
(DecodeDPairRegisterClass):
(DecodeCCOutOperand):
(DecodeSORegImmOperand):
(DecodeSORegRegOperand):
(DecodeRegListOperand):
(DecodeSPRRegListOperand):
(DecodeDPRRegListOperand):
(DecodeBitfieldMaskOperand):
(DecodeCopMemInstruction):
(DecodeAddrMode2IdxInstruction):
(DecodeSORegMemOperand):
(DecodeAddrMode3Instruction):
(DecodeRFEInstruction):
(DecodeQADDInstruction):
(DecodeMemMultipleWritebackInstruction):
(DecodeCPSInstruction):
(DecodeT2CPSInstruction):
(DecodeT2MOVTWInstruction):
(DecodeArmMOVTWInstruction):
(DecodeSMLAInstruction):
(DecodeAddrModeImm12Operand):
(DecodeAddrMode5Operand):
(DecodeAddrMode7Operand):
(DecodeT2BInstruction):
(DecodeBranchImmInstruction):
(DecodeAddrMode6Operand):
(DecodeVLDInstruction):
(DecodeVLDST1Instruction):
(DecodeVLDST2Instruction):
(DecodeVLDST3Instruction):
(DecodeVLDST4Instruction):
(DecodeVSTInstruction):
(DecodeVLD1DupInstruction):
(DecodeVLD2DupInstruction):
(DecodeVLD3DupInstruction):
(DecodeVLD4DupInstruction):
(DecodeNEONModImmInstruction):
(DecodeVSHLMaxInstruction):
(DecodeShiftRight8Imm):
(DecodeShiftRight16Imm):
(DecodeShiftRight32Imm):
(DecodeShiftRight64Imm):
(DecodeTBLInstruction):
(DecodeThumbAddSpecialReg):
(DecodeThumbBROperand):
(DecodeT2BROperand):
(DecodeThumbCmpBROperand):
(DecodeThumbAddrModeRR):
(DecodeThumbAddrModeIS):
(DecodeThumbAddrModePC):
(DecodeThumbAddrModeSP):
(DecodeT2AddrModeSOReg):
(DecodeT2LoadShift):
(DecodeT2LoadImm8):
(DecodeT2LoadImm12):
(DecodeT2LoadT):
(DecodeT2LoadLabel):
(DecodeT2Imm8S4):
(DecodeT2AddrModeImm8s4):
(DecodeT2AddrModeImm0_1020s4):
(DecodeT2Imm8):
(DecodeT2AddrModeImm8):
(DecodeT2LdStPre):
(DecodeT2AddrModeImm12):
(DecodeThumbAddSPImm):
(DecodeThumbAddSPReg):
(DecodeThumbCPS):
(DecodePostIdxReg):
(DecodeThumbBLXOffset):
(DecodeCoprocessor):
(DecodeThumbTableBranch):
(DecodeThumb2BCCInstruction):
(DecodeT2SOImm):
(DecodeThumbBCCTargetOperand):
(DecodeThumbBLTargetOperand):
(DecodeMemBarrierOption):
(DecodeInstSyncBarrierOption):
(DecodeMSRMask):
(DecodeBankedReg):
(DecodeDoubleRegLoad):
(DecodeDoubleRegStore):
(DecodeLDRPreImm):
(DecodeLDRPreReg):
(DecodeSTRPreImm):
(DecodeSTRPreReg):
(DecodeVLD1LN):
(DecodeVST1LN):
(DecodeVLD2LN):
(DecodeVST2LN):
(DecodeVLD3LN):
(DecodeVST3LN):
(DecodeVLD4LN):
(DecodeVST4LN):
(DecodeVMOVSRR):
(DecodeVMOVRRS):
(DecodeIT):
(DecodeT2LDRDPreInstruction):
(DecodeT2STRDPreInstruction):
(DecodeT2Adr):
(DecodeT2ShifterImmOperand):
(DecodeSwap):
(DecodeVCVTD):
(DecodeVCVTQ):
(DecodeLDR):
(DecodeMRRC2):

  • capstone/Source/arch/ARM/ARMGenAsmWriter.inc:
  • capstone/Source/arch/ARM/ARMGenDisassemblerTables.inc:
  • capstone/Source/arch/ARM/ARMGenInstrInfo.inc:
  • capstone/Source/arch/ARM/ARMGenRegisterInfo.inc:
  • capstone/Source/arch/ARM/ARMInstPrinter.c:

(get_op_access):
(set_mem_access):
(op_addImm):
(ARM_getRegName):
(translateShiftImm):
(printRegImmShift):
(printRegName):
(ARM_printInst):
(printOperand):
(printThumbLdrLabelOperand):
(printSORegRegOperand):
(printSORegImmOperand):
(printAM2PreOrOffsetIndexOp):
(printAddrModeTBB):
(printAddrModeTBH):
(printAddrMode2Operand):
(printAddrMode2OffsetOperand):
(printAM3PreOrOffsetIndexOp):
(printAddrMode3Operand):
(printAddrMode3OffsetOperand):
(printPostIdxImm8Operand):
(printPostIdxRegOperand):
(printPostIdxImm8s4Operand):
(printAddrMode5Operand):
(printAddrMode6Operand):
(printAddrMode7Operand):
(printAddrMode6OffsetOperand):
(printBitfieldInvMaskImmOperand):
(printMemBOption):
(printInstSyncBOption):
(printShiftImmOperand):
(printPKHLSLShiftImm):
(printPKHASRShiftImm):
(printRegisterList):
(printGPRPairOperand):
(printSetendOperand):
(printCPSIMod):
(printCPSIFlag):
(printMSRMaskOperand):
(printBankedRegOperand):
(printPredicateOperand):
(printMandatoryPredicateOperand):
(printSBitModifierOperand):
(printNoHashImmediate):
(printPImmediate):
(printCImmediate):
(printCoprocOptionImm):
(printAdrLabelOperand):
(printThumbS4ImmOperand):
(printThumbSRImm):
(printThumbITMask):
(printThumbAddrModeRROperand):
(printThumbAddrModeImm5SOperand):
(printThumbAddrModeImm5S1Operand):
(printThumbAddrModeImm5S2Operand):
(printThumbAddrModeImm5S4Operand):
(printThumbAddrModeSPOperand):
(printT2SOOperand):
(printAddrModeImm12Operand):
(printT2AddrModeImm8Operand):
(printT2AddrModeImm8s4Operand):
(printT2AddrModeImm0_1020s4Operand):
(printT2AddrModeImm8OffsetOperand):
(printT2AddrModeImm8s4OffsetOperand):
(printT2AddrModeSoRegOperand):
(printFPImmOperand):
(printNEONModImmOperand):
(printImmPlusOneOperand):
(printRotImmOperand):
(printModImmOperand):
(printFBits16):
(printFBits32):
(printVectorIndex):
(printVectorListOne):
(printVectorListTwo):
(printVectorListTwoSpaced):
(printVectorListThree):
(printVectorListFour):
(printVectorListOneAllLanes):
(printVectorListTwoAllLanes):
(printVectorListThreeAllLanes):
(printVectorListFourAllLanes):
(printVectorListTwoSpacedAllLanes):
(printVectorListThreeSpacedAllLanes):
(printVectorListFourSpacedAllLanes):
(printVectorListThreeSpaced):
(printVectorListFourSpaced):
(ARM_addVectorDataType):
(ARM_addVectorDataSize):
(ARM_addReg):
(ARM_addUserMode):
(ARM_addSysReg):

  • capstone/Source/arch/ARM/ARMMapping.c:

(ARM_reg_name2):
(ARM_insn_name):
(ARM_rel_branch):
(ARM_blx_to_arm_mode):
(ARM_reg_access):

  • capstone/Source/arch/ARM/ARMMapping.h:
  • capstone/Source/arch/ARM/ARMMappingInsn.inc:
  • capstone/Source/arch/ARM/ARMMappingInsnOp.inc:
  • capstone/Source/arch/ARM/ARMModule.c:

(ARM_global_init):
(ARM_option):
(init): Deleted.
(option): Deleted.
(ARM_enable): Deleted.

  • capstone/Source/arch/ARM/ARMModule.h: Added.
  • capstone/Source/arch/Mips/MipsDisassembler.c:

(getFeatureBits):
(Mips_init):
(readInstruction16):
(readInstruction32):
(MipsDisassembler_getInstruction):
(Mips_getInstruction):
(getReg):
(DecodeINSVE_DF_4):
(DecodeAddiGroupBranch_4):
(DecodeDaddiGroupBranch_4):
(DecodeBlezlGroupBranch_4):
(DecodeBgtzlGroupBranch_4):
(DecodeBgtzGroupBranch_4):
(DecodeBlezGroupBranch_4):
(DecodeCPU16RegsRegisterClass):
(DecodeGPR64RegisterClass):
(DecodeGPRMM16RegisterClass):
(DecodeGPRMM16ZeroRegisterClass):
(DecodeGPRMM16MovePRegisterClass):
(DecodeGPR32RegisterClass):
(DecodePtrRegisterClass):
(DecodeDSPRRegisterClass):
(DecodeFGR64RegisterClass):
(DecodeFGR32RegisterClass):
(DecodeCCRRegisterClass):
(DecodeFCCRegisterClass):
(DecodeCCRegisterClass):
(DecodeFGRCCRegisterClass):
(DecodeMem):
(DecodeCacheOp):
(DecodeCacheOpMM):
(DecodeCacheOpR6):
(DecodeSyncI):
(DecodeMSA128Mem):
(DecodeMemMMImm4):
(DecodeMemMMSPImm5Lsl2):
(DecodeMemMMGPImm7Lsl2):
(DecodeMemMMReglistImm4Lsl2):
(DecodeMemMMImm12):
(DecodeMemMMImm16):
(DecodeFMem):
(DecodeFMem2):
(DecodeFMem3):
(DecodeFMemCop2R6):
(DecodeSpecial3LlSc):
(DecodeHWRegsRegisterClass):
(DecodeAFGR64RegisterClass):
(DecodeACC64DSPRegisterClass):
(DecodeHI32DSPRegisterClass):
(DecodeLO32DSPRegisterClass):
(DecodeMSA128BRegisterClass):
(DecodeMSA128HRegisterClass):
(DecodeMSA128WRegisterClass):
(DecodeMSA128DRegisterClass):
(DecodeMSACtrlRegisterClass):
(DecodeCOP2RegisterClass):
(DecodeBranchTarget):
(DecodeJumpTarget):
(DecodeBranchTarget21):
(DecodeBranchTarget26):
(DecodeBranchTarget7MM):
(DecodeBranchTarget10MM):
(DecodeBranchTargetMM):
(DecodeJumpTargetMM):
(DecodeAddiur2Simm7):
(DecodeUImm6Lsl2):
(DecodeLiSimm7):
(DecodeSimm4):
(DecodeSimm16):
(DecodeLSAImm):
(DecodeInsSize):
(DecodeExtSize):
(DecodeSimm19Lsl2):
(DecodeSimm18Lsl3):
(DecodeSimm9SP):
(DecodeANDI16Imm):
(DecodeUImm5lsl2):
(DecodeRegListOperand):
(DecodeRegListOperand16):
(DecodeMovePRegPair):
(DecodeSimm23Lsl2):

  • capstone/Source/arch/Mips/MipsDisassembler.h:
  • capstone/Source/arch/Mips/MipsGenAsmWriter.inc:
  • capstone/Source/arch/Mips/MipsGenDisassemblerTables.inc:
  • capstone/Source/arch/Mips/MipsGenInstrInfo.inc:
  • capstone/Source/arch/Mips/MipsGenRegisterInfo.inc:
  • capstone/Source/arch/Mips/MipsInstPrinter.c:

(set_mem_access):
(isReg):
(MipsFCCToString):
(printRegName):
(Mips_printInst):
(printOperand):
(printUnsignedImm):
(printUnsignedImm8):
(printMemOperand):
(printMemOperandEA):
(printFCCOperand):
(printRegisterPair):
(printAlias1):
(printAlias2):
(printAlias):
(printRegisterList):

  • capstone/Source/arch/Mips/MipsMapping.c:

(Mips_get_insn_id):
(Mips_group_name):
(Mips_map_insn):
(Mips_map_register):

  • capstone/Source/arch/Mips/MipsMappingInsn.inc:
  • capstone/Source/arch/Mips/MipsModule.c:

(updated_mode):
(Mips_global_init):
(Mips_option):
(init): Deleted.
(option): Deleted.
(Mips_enable): Deleted.

  • capstone/Source/arch/Mips/MipsModule.h: Added.
  • capstone/Source/capstone.pc.in:
  • capstone/Source/cmake.sh: Added.
  • capstone/Source/config.mk:
  • capstone/Source/cs.c:

(cs_version):
(cs_support):
(cs_errno):
(cs_strerror):
(cs_open):
(cs_close):
(fill_insn):
(skipdata_size):
(cs_option):
(skipdata_opstr):
(cs_disasm):
(cs_disasm_ex):
(cs_free):
(cs_malloc):
(cs_disasm_iter):
(cs_reg_name):
(cs_insn_name):
(cs_group_name):
(cs_insn_group):
(cs_reg_read):
(cs_reg_write):
(cs_op_count):
(cs_op_index):
(cs_regs_access):
(cs_kern_os_calloc): Deleted.

  • capstone/Source/cs_priv.h:
  • capstone/Source/functions.mk:
  • capstone/Source/include/capstone/arm.h:
  • capstone/Source/include/capstone/arm64.h:
  • capstone/Source/include/capstone/capstone.h:
  • capstone/Source/include/capstone/evm.h:
  • capstone/Source/include/capstone/m680x.h:
  • capstone/Source/include/capstone/m68k.h:
  • capstone/Source/include/capstone/mips.h:
  • capstone/Source/include/capstone/mos65xx.h: Added.
  • capstone/Source/include/capstone/platform.h:
  • capstone/Source/include/capstone/ppc.h:
  • capstone/Source/include/capstone/sparc.h:
  • capstone/Source/include/capstone/systemz.h:
  • capstone/Source/include/capstone/tms320c64x.h:
  • capstone/Source/include/capstone/x86.h:
  • capstone/Source/include/capstone/xcore.h:
  • capstone/Source/include/platform.h: Copied from Source/ThirdParty/capstone/Source/include/capstone/platform.h.
  • capstone/Source/include/windowsce/stdint.h:
  • capstone/Source/make.sh:
  • capstone/Source/nmake-x86.bat: Removed.
  • capstone/Source/nmake.bat:
  • capstone/Source/pkgconfig.mk:
  • capstone/Source/utils.c:

(make_id2insn):
(insn_find):
(name2id):
(id2name):
(count_positive):
(count_positive8):
(cs_strdup):
(cs_snprintf):
(arr_exist8):
(arr_exist):

  • capstone/Source/utils.h:
  • capstone/capstone-Revision.txt:
2:28 AM Changeset in webkit [271082] by mark.lam@apple.com
  • 3 edits
    1 add in trunk

VMInspector::dumpRegisters() should not dump beyond the start of the next frame.
​https://bugs.webkit.org/show_bug.cgi?id=220136
rdar://64404201

Reviewed by Yusuke Suzuki.

JSTests:

  • stress/dumpRegisters-should-stop-before-next-frame.js: Added.

Source/JavaScriptCore:

VMInspector::dumpRegisters() was dumping stack slots up for up to
codeBlock->numCalleeLocals() slots for any given CallFrame. This is incorrect.
codeBlock->numCalleeLocals() indicates the maximum number of stack slots that the
codeBlock may use. However, the executing codeBlock may not necessary use up that
number of slots before calling another function.

In the attached test case, the global program has 98 callee locals. However, it
was only using a very small number of stack slots to call $vm.dumpRegisters().
On an ASAN build, iterating thru 98 stack slots of the global program (to dump
their contents) ended up reading beyond the top of the stack, and this made ASAN
very unhappy. The fix is simply to ensure that VMInspector::dumpRegisters() never
dumps past the start of the next CallFrame.

  • tools/VMInspector.cpp:

(JSC::VMInspector::dumpRegisters):

Note: See TracTimeline for information about the timeline view.