| | 83 | |
| | 84 | * CPU() - the target CPU architecture |
| | 85 | * CPU(ALPHA) - DEC Alpha |
| | 86 | * CPU(IA64) - Itanium / IA-64 |
| | 87 | * CPU(PPC) - PowerPC 32-bit |
| | 88 | * CPU(PPC64) - PowerPC 64-bit |
| | 89 | * CPU(SH4) - SuperH SH-4 |
| | 90 | * CPU(SPARC) - any SPARC, true for CPU(SPARC32) and CPU(SPARC64) |
| | 91 | * CPU(SPARC32) - SPARC 32-bit |
| | 92 | * CPU(SPARC64) - SPARC 64-bit |
| | 93 | * CPU(X86) - i386 / x86 32-bit |
| | 94 | * CPU(X86_64) - AMD64 / Intel64 / x86_64 64-bit |
| | 95 | * CPU(ARM) - ARM, any version |
| | 96 | * CPU(ARMV5_OR_LOWER) - ARM instruction set v5 or earlier (cutoff point for some interesting ARM features) |
| | 97 | * CPU(ARM_TRADITIONAL) - Thumb2 is not available, only traditional ARM (v4 or greater) |
| | 98 | * CPU(ARM_THUMB2) - Thumb2 instruction set is available |
| | 99 | * CPU(BIG_ENDIAN) - big-endian architecture (if neither this or the next one is set, assume little-endian) |
| | 100 | * CPU(MIDDLE_ENDIAN) - middle-endian architecture |
